component

MM74HC595MTC

Public Made by Adom

by adom

onsemi Shifting Register, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icsmm74hc595mtcfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers mm74hc595mtc: viewers · Ray 7d ago
mm74hc595mtc-etched.glb Publish 0.1.0 · Ray 7d ago
mm74hc595mtc-etched.step mm74hc595mtc: factory component page (tier=mfr) · Ray 7d ago
mm74hc595mtc-hero.glb mm74hc595mtc: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
mm74hc595mtc-hero.overlay.json Publish 0.1.0 · Ray 7d ago
mm74hc595mtc.glb Publish 0.1.0 · Ray 7d ago
mm74hc595mtc.kicad_mod Publish 0.1.0 · Ray 7d ago
mm74hc595mtc.kicad_sym Publish 0.1.0 · Ray 7d ago
mm74hc595mtc.lbr Publish 0.1.0 · Ray 7d ago
mm74hc595mtc.step Publish 0.1.0 · Ray 7d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago

MM74HC595MTC

onsemi · Shifting Register · TSSOP-16

MM74HC595MTC from onsemi, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 QB tri_state Parallel output bit B from the storage register, a 3-state output that goes high-impedance when G is HIGH.
2 QC tri_state Parallel output bit C from the storage register, a 3-state output that goes high-impedance when G is HIGH.
3 QD tri_state Parallel output bit D from the storage register, a 3-state output that goes high-impedance when G is HIGH.
4 QE tri_state Parallel output bit E from the storage register, a 3-state output that goes high-impedance when G is HIGH.
5 QF tri_state Parallel output bit F from the storage register, a 3-state output that goes high-impedance when G is HIGH.
6 QG tri_state Parallel output bit G from the storage register, a 3-state output that goes high-impedance when G is HIGH.
7 QH tri_state Parallel output bit H from the storage register, a 3-state output that goes high-impedance when G is HIGH.
8 GND power_in Ground reference; all device voltages are referenced to this pin.
9 Q'H output Serial data output of the shift register (cascade output) that is forced to 0 when SCLR and G are LOW; it is not part of the 3-state group.
10 SCLR input Active-low shift register clear that forces the shift register contents to zero (Q'H = 0 while G is LOW, per the truth table).
11 SCK input Shift register clock, positive-edge triggered, with a guaranteed shift frequency of DC to 30 MHz at 5 V.
12 RCK input Storage register clock, positive-edge triggered, that transfers the shift register contents to the output latches.
13 G input Active-high output enable; when HIGH, QA through QH are forced to the 3-state (high-impedance) condition.
14 SER input Serial data input to the shift register, shifted into bit Q0 on the SCK positive edge.
15 QA tri_state Parallel output bit A from the storage register, a 3-state output that goes high-impedance when G is HIGH.
16 VCC power_in Supply voltage, recommended range 2 V to 6 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum HIGH Level Input Voltage VIH 1.5 V VCC=2.0V, TA=-40 to 85°C 6
Minimum HIGH Level Input Voltage VIH 3.15 V VCC=4.5V, TA=-40 to 85°C 6
Minimum HIGH Level Input Voltage VIH 4.2 V VCC=6.0V, TA=-40 to 85°C 6
Maximum LOW Level Input Voltage VIL 0.5 V VCC=2.0V, TA=-40 to 85°C 6
Maximum LOW Level Input Voltage VIL 1.35 V VCC=4.5V, TA=-40 to 85°C 6
Maximum LOW Level Input Voltage VIL 1.8 V VCC=6.0V, TA=-40 to 85°C 6
Minimum HIGH Level Output Voltage VOH 1.9 2 V VIN=VIH or VIL, /IOUT/≤20µA, VCC=2.0V, TA=-40 to 85°C (typ at 25°C) 6
Minimum HIGH Level Output Voltage VOH 4.4 4.5 V VIN=VIH or VIL, /IOUT/≤20µA, VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 6
Minimum HIGH Level Output Voltage VOH 5.9 6 V VIN=VIH or VIL, /IOUT/≤20µA, VCC=6.0V, TA=-40 to 85°C (typ at 25°C) 6
Minimum HIGH Level Output Voltage Q'H VOH 3.84 4.2 V VIN=VIH or VIL, /IOUT/≤4.0mA, VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 6
Minimum HIGH Level Output Voltage Q'H VOH 5.34 5.2 V VIN=VIH or VIL, /IOUT/≤5.2mA, VCC=6.0V, TA=-40 to 85°C (typ at 25°C) 6
Minimum HIGH Level Output Voltage QA-QH VOH 3.84 4.2 V VIN=VIH or VIL, /IOUT/≤6.0mA, VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 6
Minimum HIGH Level Output Voltage QA-QH VOH 5.34 5.7 V VIN=VIH or VIL, /IOUT/≤7.8mA, VCC=6.0V, TA=-40 to 85°C (typ at 25°C) 6
Maximum LOW Level Output Voltage VOL 0 0.1 V VIN=VIH or VIL, /IOUT/≤20µA, VCC=2.0V, TA=-40 to 85°C (typ at 25°C) 6
Maximum LOW Level Output Voltage Q'H VOL 0.2 0.33 V VIN=VIH or VIL, /IOUT/≤4.0mA, VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 6
Maximum LOW Level Output Voltage QA-QH VOL 0.2 0.33 V VIN=VIH or VIL, /IOUT/≤6.0mA, VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 6
Maximum Input Leakage IIN -1 1 µA VIN=VCC or GND, VCC=6.0V, TA=-40 to 85°C 6
Maximum 3-State Output Leakage IOZ -5 5 µA VOUT=VCC or GND, G=VIH, VCC=6.0V, TA=-40 to 85°C 6
Maximum Quiescent Supply Current ICC 8 80 µA VIN=VCC or GND, IOUT=0µA, VCC=6.0V, TA=-40 to 85°C (typ at 25°C) 6
Maximum Operating Frequency fMAX 4.8 10 MHz CL=50pF, VCC=2.0V, TA=-40 to 85°C (typ at 25°C) 8
Maximum Operating Frequency fMAX 24 45 MHz CL=50pF, VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 8
Maximum Operating Frequency fMAX 28 50 MHz CL=50pF, VCC=6.0V, TA=-40 to 85°C (typ at 25°C) 8
Maximum Propagation Delay, SCK to Q'H tPHL,tPLH 14 53 ns CL=50pF, VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 8
Maximum Propagation Delay, RCK to QA thru Q'H tPHL,tPLH 21 44 ns CL=50pF, VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 8
Maximum Output Enable Time from G to QA thru Q'H tPZH,tPZL 15 44 ns RL=1kΩ, CL=50pF, VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 8
Maximum Output Disable Time from G to QA thru Q'H tPHZ,tPLZ 15 44 ns RL=1kΩ, CL=50pF, VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 8
Minimum Setup Time from SER to SCK tS 20 25 ns RL=1kΩ, CL=50pF, VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 9
Minimum Removal Time from SCLR to SCK tR 10 13 ns VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 9
Minimum Setup Time from SCK to RCK tS 20 25 ns VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 9
Minimum Hold Time from SER to SCK tH 5 5 ns VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 9
Minimum Pulse Width of SCK or SCLR tW 9 20 ns VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 9
Maximum Input Rise and Fall Time, Clock tR,tF 500 ns VCC=4.5V, TA=-40 to 85°C 9
Maximum Output Rise and Fall Time QA-QH tTHL,tTLH 7 15 ns VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 9
Maximum Output Rise and Fall Time Q'H tTHL,tTLH 15 22 ns VCC=4.5V, TA=-40 to 85°C (typ at 25°C) 9
Maximum Input Capacitance CIN 5 10 pF TA=-40 to 85°C (typ at 25°C) 9
Maximum Output Capacitance COUT 15 20 pF TA=-40 to 85°C (typ at 25°C) 9
Power Dissipation Capacitance, Outputs Enabled CPD 90 pF G=VCC 9
Power Dissipation Capacitance, Outputs Enabled CPD 150 pF G=GND 9
Supply Voltage VCC 2 6 V 5
DC Input or Output Voltage VIN, VOUT 0 V max is VCC 5
Operating Temperature Range TA -40 85 °C 5
Input Rise and Fall Times tR,tF 1000 ns VCC=2.0V 5
Input Rise and Fall Times tR,tF 500 ns VCC=4.5V 5
Input Rise and Fall Times tR,tF 400 ns VCC=6.0V 5
Supply Voltage VCC -0.5 7 V 5
DC Input Voltage VIN -1.5 V -1.5 to VCC+1.5 5
DC Output Voltage VOUT -0.5 V -0.5 to VCC+0.5 5
Clamp Diode Current IIK, IOK -20 20 mA ±20 5
DC Output Current, per Pin IOUT -35 35 mA ±35 5
DC VCC or GND Current, per Pin ICC -70 70 mA ±70 5
Storage Temperature Range TSTG -65 150 °C 5
Lead Temperature TL 260 °C 5
Electrostatic Discharge Capability ESD 4000 V Human Body Model, JESD22-A114 5

CAD (KiCad official)

  • Symbol: MM74HC595MTC
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: mm74hc595mtc-etched.step / mm74hc595mtc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mm74hc595mtc.step / mm74hc595mtc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (16 pp, sha256 d5478843a2f0d444, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF