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Name	Last commit message	Last updated
docs	mkdv16gcl-stp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
viewers	mkdv16gcl-stp: viewers · Ray	4d ago
mkdv16gcl-stp-etched.fit.json	mkdv16gcl-stp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
mkdv16gcl-stp-etched.glb	mkdv16gcl-stp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
mkdv16gcl-stp-etched.step	mkdv16gcl-stp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
mkdv16gcl-stp.glb	Publish 0.1.0 · Ray	4d ago
mkdv16gcl-stp.kicad_mod	Publish 0.1.0 · Ray	4d ago
mkdv16gcl-stp.kicad_sym	Publish 0.1.0 · Ray	4d ago
mkdv16gcl-stp.lbr	Publish 0.1.0 · Ray	4d ago
mkdv16gcl-stp.step	Publish 0.1.0 · Ray	4d ago
package.json	Publish 0.1.0 · Ray	4d ago
page.json	Set visibility: public · Ray	4d ago
README.md	Initial commit: component/mkdv16gcl-stp · Ray	4d ago

MKDV16GCL-STP

MK · NAND FLASH · LGA-8(6.6x8)

MKDV16GCL-STP from MK, in a LGA-8(6.6x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	DAT2	bidirectional	SD data line bit 2 (I/O push-pull in SD mode); reserved in SPI mode; host must pull up via RDAT (10 k-100 kΩ) even in 1-bit SD mode.
2	DAT3	bidirectional	SD data line bit 3 (I/O push-pull in SD mode); active-low chip select (CS#) in SPI mode; carries internal 10-90 kΩ pull-up (RDAT3) for mode selection and card detection, disconnectable via ACMD42.
3	CLK	input	Host clock input; supports up to 50 MHz; should be driven to logic 0 during power-down to prevent current draw through signal lines.
4	GND	power_in	Supply voltage ground reference (VSS); common ground for all signal and power circuitry.
5	CMD	bidirectional	Bidirectional command/response line (push-pull); host sends addressed or broadcast commands, card returns responses; data input (DI) in SPI mode; pull up via RCMD (10 k-100 kΩ).
6	DAT0	bidirectional	SD data line bit 0 (I/O push-pull); default single-bit data path after power-up; data output (DO) in SPI mode; pull up via RDAT (10 k-100 kΩ).
7	DAT1	bidirectional	SD data line bit 1 (I/O push-pull in SD mode); acts as input on power-up until SET_BUS_WIDTH is issued; reserved in SPI mode; pull up via RDAT (10 k-100 kΩ).
8	VDD	power_in	Supply voltage 2.7 V to 3.6 V (nominally 3.3 V); standby current max 0.25 mA at 3.6 V/25 MHz, operating write current max 30 mA at 3.3 V/25 MHz; decouple with 2.2 µF capacitor.

Key specifications

Parameter	Value
Manufacturer	MK
Package	LGA-8(6.6x8)
Category	Memory
Pins	8

CAD (KiCad official)

Symbol: MKDV16GCL-STP
Footprint: Package_LGA:LGA-8_8x6.2mm_P1.27mm
3D model: LGA-8(6.6x8), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal LGA height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
3D model files: mkdv16gcl-stp-etched.step / mkdv16gcl-stp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mkdv16gcl-stp.step / mkdv16gcl-stp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: MK datasheet (21 pp, sha256 d21400e090b98897, retrieved 2026-10-01, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF