component
M95010-WMN6P
Public Made by Adomby adom
STMicroelectronics Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 10d ago |
| viewers | 10d ago |
| m95010-wmn6p-etched.glb | 10d ago |
| m95010-wmn6p-etched.step | 10d ago |
| m95010-wmn6p-hero.glb | 10d ago |
| m95010-wmn6p-hero.overlay.json | 10d ago |
| m95010-wmn6p.glb | 10d ago |
| m95010-wmn6p.kicad_mod | 10d ago |
| m95010-wmn6p.kicad_sym | 10d ago |
| m95010-wmn6p.lbr | 10d ago |
| m95010-wmn6p.step | 10d ago |
| package.json | 10d ago |
| page.json | 10d ago |
| README.md | 10d ago |
| verification.json | 10d ago |
M95010-WMN6P
STMicroelectronics · Pre-ordered Chips · SOIC-8
M95010-WMN6P from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Chip Select: driving S high deselects the device and puts Q in high impedance, and driving it low selects the device; after power-up a falling edge on S is required before any instruction. |
| 2 | Q | output | Serial Data Output shifts data out on the falling edge of C and is high impedance when the device is deselected or in the Hold condition. |
| 3 | W | input | Write Protect: when held low, writes to the memory are disabled while other operations remain enabled, and W must be driven high or low and must not be left floating. |
| 4 | VSS | power_in | Ground: the reference for the VCC supply voltage. |
| 5 | D | input | Serial Data Input receives instructions, addresses and data to be written, latched on the rising edge of the Serial Clock C. |
| 6 | C | input | Serial Clock provides the serial interface timing: instructions, addresses and data on D are latched on its rising edge, and data on Q changes after its falling edge. |
| 7 | HOLD | input | Hold pauses serial communication without deselecting the device; during Hold, Q is high impedance and D and C are Don't Care, and the device must be selected with S low to enter Hold. |
| 8 | VCC | power_in | Supply voltage: 2.5 V to 5.5 V for the M950x0-W (M95010-W), which must remain stable and within VCC(min) to VCC(max) during all operations. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (operating, M950x0-W) | VCC | 2.5 | 5.5 | V | 31 | ||
| Ambient operating temperature (device grade 6) | TA | -40 | 85 | °C | 31 | ||
| Ambient operating temperature | TAMR | -40 | 130 | °C | 30 | ||
| Storage temperature | TSTG | -65 | 150 | °C | 30 | ||
| Output voltage | VO | -0.5 | V | 30 | |||
| Input voltage | VI | -0.5 | V | 30 | |||
| DC output current (Q = 0) | IOL | 5 | mA | Q = 0 | 30 | ||
| DC output current (Q = 1) | IIH | 5 | mA | Q = 1 | 30 | ||
| Supply voltage (absolute maximum) | VCC | -0.5 | 6.5 | V | 30 | ||
| Electrostatic pulse voltage (Human Body Model) | VESD | 4000 | V | Human Body Model | 30 | ||
| Input leakage current | ILI | -2 | 2 | µA | VIN = VSS or VCC | 33 | |
| Output leakage current | ILO | -2 | 2 | µA | S = VCC, VOUT = VSS or VCC | 33 | |
| Supply current (Read) | ICC | 2 | mA | VCC = 2.5 V, fC = 5 MHz, C = 0.1 VCC/0.9 VCC, Q = open | 33 | ||
| Supply current (Read) | ICC | 5 | mA | VCC = 5.5 V, fC = 20 MHz, C = 0.1 VCC/0.9 VCC, Q = open; only for process letter K devices | 33 | ||
| Supply current (Write) | ICC0 | 5 | mA | During tW, S = VCC, 2.5 V < VCC < 5.5 V | 33 | ||
| Supply current (Standby) | ICC1 | 3 | µA | S = VCC, VCC = 5.5 V, VIN = VSS or VCC | 33 | ||
| Supply current (Standby) | ICC1 | 2 | µA | S = VCC, VCC = 2.5 V, VIN = VSS or VCC | 33 | ||
| Input low voltage | VIL | -0.45 | V | 33 | |||
| Output low voltage | VOL | 0.4 | V | IOL = 1.5 mA, VCC = 2.5 V | 33 | ||
| Internal reset threshold voltage | VRES | 1 | 1.65 | V | 33 | ||
| Output capacitance (Q) | COUT | 8 | pF | VOUT = 0 V; sampled only, TA = 25 °C, 5 MHz | 32 | ||
| Input capacitance (D) | CIN | 8 | pF | VIN = 0 V; sampled only, TA = 25 °C, 5 MHz | 32 | ||
| Input capacitance (other pins) | CIN | 6 | pF | VIN = 0 V; sampled only, TA = 25 °C, 5 MHz | 32 | ||
| Write cycle endurance | Ncycle | 4e+06 | TA ≤ 25 °C, VCC(min) < VCC < VCC(max) | 32 | |||
| Write cycle endurance | Ncycle | 1.2e+06 | TA = 85 °C, VCC(min) < VCC < VCC(max) | 32 | |||
| Data retention | 200 | Year | TA = 55 °C | 32 | |||
| Clock frequency | fC | 10 | MHz | VCC = 2.5 to 5.5 V | 35 | ||
| S active setup time | tSLCH | 30 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| S not active setup time | tSHCH | 30 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| S deselect time | tSHSL | 40 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| S active hold time | tCHSH | 30 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| S not active hold time | tCHSL | 30 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Clock high time | tCH | 40 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Clock low time | tCL | 40 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Clock rise time | tCLCH | 2 | µs | VCC = 2.5 to 5.5 V | 35 | ||
| Clock fall time | tCHCL | 2 | µs | VCC = 2.5 to 5.5 V | 35 | ||
| Data in setup time | tDVCH | 10 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Data in hold time | tCHDX | 10 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Clock low hold time after HOLD not active | tHHCH | 30 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Clock low hold time after HOLD active | tHLCH | 30 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Clock low set-up time before HOLD active | tCLHL | 0 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Clock low set-up time before HOLD not active | tCLHH | 0 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Output disable time | tSHQZ | 40 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Clock low to output valid | tCLQV | 40 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Output hold time | tCLQX | 0 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Output rise time | tQLQH | 40 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Output fall time | tQHQL | 40 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| HOLD high to output valid | tHHQV | 40 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| HOLD low to output high-Z | tHLQZ | 40 | ns | VCC = 2.5 to 5.5 V | 35 | ||
| Write time | tW | 5 | ms | VCC = 2.5 to 5.5 V | 35 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | TLEAD Lead temperature during soldering see note (1) 1. Compliant with JEDEC standard J-STD-020D (for small-body, Sn-Pb or Pb assembly), the ST ECOPACK® | 30 |
CAD (KiCad official)
- Symbol:
M95010-WMN6P - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
m95010-wmn6p-etched.step/m95010-wmn6p-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m95010-wmn6p.step/m95010-wmn6p.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (46 pp, sha256
1b7ee07d5879b564, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).