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LT3060EDC-3.3#TRPBF

Analog Devices · Linear Voltage Regulators (LDO) · DFN-8-EP(2x2)

LT3060EDC-3.3#TRPBF from Analog Devices, in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF/BYP passive A single capacitor from this pin to GND bypasses the reference noise and soft-starts the reference (10nF typically gives 30µVRMS noise over 10Hz to 100kHz), and the pin must not be driven by active circuitry and must be left floating if low noise or soft-start is not required.
2 ADJ input This is the error amplifier's inverting input with a typical 15nA bias flowing out of the pin and 600mV referenced to GND, and for fixed-voltage versions it must be left floating if low noise and fast transient response are not required.
3 OUT power_out This pin supplies power to the load, requires a minimum 2.2µF ceramic output capacitor for stability, and the permissible output voltage range is 600mV to 44.5V.
4 OUT power_out This pin supplies power to the load and is internally connected with pin 3 as an output, with the same 2.2µF minimum ceramic output capacitor requirement and 600mV to 44.5V permissible output range.
5 IN power_in This pin supplies power to the device over the 1.6V to 45V input range, needs a 1µF to 10µF bypass capacitor (local to the pin if more than six inches from the main input filter), and withstands reverse voltage relative to GND and OUT.
6 IN power_in This pin supplies power to the device over the 1.6V to 45V input range and is internally connected with pin 5 as an input, with the same 1µF to 10µF bypass capacitor guidance and reverse-voltage withstand.
7 SHDN input Pulling this pin low puts the LT3060 into shutdown and turns the output off, it must not be driven below GND unless tied to IN, the device does not function if the pin is left unconnected, and it is connected to IN if unused.
8 GND power_in This is the ground pin, which for the DFN package must be tied to the exposed pad (pin 9) and the PCB ground.
9 GND power_in The exposed pad is GND, must be soldered to the PCB, and provides enhanced thermal performance through its connection to PCB ground with TJMAX = 125°C and θJA = 48°C/W to 60°C/W for the DFN package.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package DFN-8-EP(2x2)
Category Power Management ICs
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Regulated Output Voltage (25°C) VOUT 3.267 3.3 3.333 V VIN = 3.85V, ILOAD = 1mA 4
Regulated Output Voltage (E-, I-Grades, over temperature) VOUT 3.234 3.3 3.366 V 3.85V < VIN < 45V, 1mA < ILOAD < 100mA (E-, I-Grades) 4
Minimum Input Voltage 1.6 2.1 V ILOAD = 100mA (over temperature range) 4
Line Regulation (E-, I-Grades) 1.3 7 mV ΔVIN = 3.85V to 45V, ILOAD = 1mA (E-, I-Grades) 4
Load Regulation (E-, I-Grades) 3.1 24 mV VIN = 3.85V, ILOAD = 1mA to 100mA (E-, I-Grades) 5
Dropout Voltage VDO 75 110 mV VIN = VOUT(NOMINAL), ILOAD = 1mA 5
Dropout Voltage (over temperature) VDO 180 mV VIN = VOUT(NOMINAL), ILOAD = 1mA (over temperature range) 5
Dropout Voltage VDO 150 200 mV VIN = VOUT(NOMINAL), ILOAD = 10mA 5
Dropout Voltage (over temperature) VDO 300 mV VIN = VOUT(NOMINAL), ILOAD = 10mA (over temperature range) 5
Dropout Voltage VDO 240 280 mV VIN = VOUT(NOMINAL), ILOAD = 50mA (Note 14) 5
Dropout Voltage (over temperature) VDO 410 mV VIN = VOUT(NOMINAL), ILOAD = 50mA (Note 14, over temperature range) 5
Dropout Voltage VDO 300 350 mV VIN = VOUT(NOMINAL), ILOAD = 100mA (Note 14) 5
Dropout Voltage (over temperature) VDO 510 mV VIN = VOUT(NOMINAL), ILOAD = 100mA (Note 14, over temperature range) 5
GND Pin Current 40 80 µA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 0µA 5
GND Pin Current 60 100 µA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 1mA 5
GND Pin Current 160 350 µA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 10mA 5
GND Pin Current 0.8 1.8 mA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 50mA 5
GND Pin Current 2 4 mA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 100mA 5
Quiescent Current in Shutdown 0.3 1 µA VIN = 45V, VSHDN = 0V 5
ADJ Pin Bias Current 15 60 nA VIN = 2.1V (over temperature range) 5
SHDN Pin Current 0.9 µA VSHDN = 0V (over temperature range) 5
SHDN Pin Current 1 3 µA VSHDN = 45V (over temperature range) 5
Shutdown Threshold (Off to On) 0.3 0.8 V VOUT = Off to On (over temperature range) 5
Shutdown Threshold (On to Off) 0.7 1.5 V VOUT = On to Off (over temperature range) 5
Ripple Rejection 55 70 dB VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 100mA, VIN = 4.8V (Avg) 5
Current Limit 110 200 mA VIN = VOUT(NOMINAL) + 1V (Notes 6, 12), ΔVOUT = -5% (over temperature range for min) 5
Input Reverse Leakage Current 300 µA VIN = -45V, VOUT = 0 (over temperature range) 6
Reverse Output Current 5 10 µA VOUT = 3.3V, VIN = 0V 6
IN Pin Voltage VIN -50 50 V 2
OUT Pin Voltage VOUT -50 50 V 2
Input-to-Output Differential Voltage VIN-VOUT -50 50 V Note 2 2
ADJ Pin Voltage VADJ -50 50 V 2
SHDN Pin Voltage VSHDN -50 50 V 2
REF/BYP Pin Voltage VREF/BYP -0.3 1 V Note 1 2
Operating Junction Temperature (E-, I-Grades) TJ -40 125 °C E-, I-Grades 2
Storage Temperature Range TSTG -65 150 °C 2
Maximum Junction Temperature (DFN) TJMAX 125 °C DC (DFN) package, E-, I-Grades 2
Thermal Resistance, Junction-to-Ambient (DFN) θJA 48 60 °C/W DFN, depends on copper area (see Table 2) 2
Thermal Resistance, Junction-to-Case (DFN) θJC 20 °C/W DFN package 2
Input Voltage Range VIN 1.6 45 V Operating input supply range (description) 1
Permissible Output Voltage Range VOUT 0.6 44.5 V OUT pin (pin function description) 15

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts COPPER Table 2. DC Package, 8-Lead DFN COPPER AREA 20

CAD (KiCad official)

  • Symbol: LT3060EDC-3.3#TRPBF
  • Footprint: Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.45mm_EP0.64x1.37mm
  • 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: lt3060edc-3-3-trpbf-etched.step / lt3060edc-3-3-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt3060edc-3-3-trpbf.step / lt3060edc-3-3-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (26 pp, sha256 1da5b0984b8afdd3, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF