LMK00301SQX

{
  "slug": "lmk00301sqx",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Clock Buffers, Drivers, WQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "rtc-clock chip",
    "lmk00301sqx",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "lmk00301sqx.kicad_sym",
    "lmk00301sqx.kicad_mod",
    "lmk00301sqx.glb",
    "lmk00301sqx.step",
    "lmk00301sqx.lbr",
    "docs/hero.png",
    "docs/lmk00301sqx-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lmk00301sqx-hero.glb",
    "lmk00301sqx-hero.overlay.json"
  ],
  "component": {
    "mpn": "LMK00301SQX",
    "manufacturer": "Texas Instruments",
    "package": "WQFN-48-EP(7x7)",
    "pin_count": 49,
    "category": "RTC/Clock Chip",
    "subcategory": "Clock Buffers, Drivers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/lmk00301",
    "parts": {
      "symbol": "lmk00301sqx.kicad_sym",
      "footprint": "lmk00301sqx.kicad_mod",
      "model_3d": "lmk00301sqx-hero.glb",
      "model_3d_plain": "lmk00301sqx.glb",
      "model_3d_step": "lmk00301sqx-etched.step",
      "model_3d_step_plain": "lmk00301sqx.step",
      "lbr": "lmk00301sqx.lbr"
    },
    "distributor_links": {
      "lcsc": "C2673022"
    },
    "distributor_check": {
      "checked_at": "2026-10-07T22:30:18Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CLKoutA0",
        "type": "output",
        "description": "Differential clock output A0 (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutA_TYPE pins."
      },
      {
        "number": "2",
        "name": "CLKoutA0*",
        "type": "output",
        "description": "Complementary differential clock output A0* (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutA_TYPE pins."
      },
      {
        "number": "3",
        "name": "CLKoutA1",
        "type": "output",
        "description": "Differential clock output A1 (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutA_TYPE pins."
      },
      {
        "number": "4",
        "name": "CLKoutA1*",
        "type": "output",
        "description": "Complementary differential clock output A1* (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutA_TYPE pins."
      },
      {
        "number": "5",
        "name": "VCCOA",
        "type": "power_in",
        "description": "Output buffer supply for bank A, operating at 3.3 V or 2.5 V (±5%); VCCOA pins are internally connected and must not exceed VCC."
      },
      {
        "number": "6",
        "name": "CLKoutA2",
        "type": "output",
        "description": "Differential clock output A2 (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutA_TYPE pins."
      },
      {
        "number": "7",
        "name": "CLKoutA2*",
        "type": "output",
        "description": "Complementary differential clock output A2* (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutA_TYPE pins."
      },
      {
        "number": "8",
        "name": "VCCOA",
        "type": "power_in",
        "description": "Output buffer supply for bank A, operating at 3.3 V or 2.5 V (±5%); VCCOA pins are internally connected and must not exceed VCC."
      },
      {
        "number": "9",
        "name": "CLKoutA3",
        "type": "output",
        "description": "Differential clock output A3 (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutA_TYPE pins."
      },
      {
        "number": "10",
        "name": "CLKoutA3*",
        "type": "output",
        "description": "Complementary differential clock output A3* (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutA_TYPE pins."
      },
      {
        "number": "11",
        "name": "CLKoutA4",
        "type": "output",
        "description": "Differential clock output A4 (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutA_TYPE pins."
      },
      {
        "number": "12",
        "name": "CLKoutA4*",
        "type": "output",
        "description": "Complementary differential clock output A4* (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutA_TYPE pins."
      },
      {
        "number": "13",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "14",
        "name": "CLKoutA_TYPE0",
        "type": "input",
        "description": "CMOS control input with internal pull-down that selects the bank A output buffer type together with CLKoutA_TYPE1."
      },
      {
        "number": "15",
        "name": "VCC",
        "type": "power_in",
        "description": "Core and input buffer block supply, operating at 3.3 V; bypass with a 0.1 µF low-ESR capacitor placed close to each VCC pin."
      },
      {
        "number": "16",
        "name": "OSCin",
        "type": "input",
        "description": "Crystal input, which can also be driven by an XO, TCXO, or other external single-ended clock (up to 250 MHz)."
      },
      {
        "number": "17",
        "name": "OSCout",
        "type": "output",
        "description": "Crystal output; leave floating when OSCin is driven by a single-ended clock."
      },
      {
        "number": "18",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "19",
        "name": "CLKin_SEL0",
        "type": "input",
        "description": "CMOS clock input select control with internal pull-down that selects CLKin0, CLKin1, or OSCin together with CLKin_SEL1."
      },
      {
        "number": "20",
        "name": "CLKin0",
        "type": "input",
        "description": "Universal clock input 0, accepting differential or single-ended signals and operating up to 3.1 GHz."
      },
      {
        "number": "21",
        "name": "CLKin0*",
        "type": "input",
        "description": "Complementary universal clock input 0*, used with CLKin0 for differential operation or biased externally for single-ended operation."
      },
      {
        "number": "22",
        "name": "CLKin_SEL1",
        "type": "input",
        "description": "CMOS clock input select control with internal pull-down that selects CLKin0, CLKin1, or OSCin together with CLKin_SEL0."
      },
      {
        "number": "23",
        "name": "CLKoutB_TYPE0",
        "type": "input",
        "description": "CMOS control input with internal pull-down that selects the bank B output buffer type together with CLKoutB_TYPE1."
      },
      {
        "number": "24",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "25",
        "name": "CLKoutB4*",
        "type": "output",
        "description": "Complementary differential clock output B4* (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutB_TYPE pins."
      },
      {
        "number": "26",
        "name": "CLKoutB4",
        "type": "output",
        "description": "Differential clock output B4 (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutB_TYPE pins."
      },
      {
        "number": "27",
        "name": "CLKoutB3*",
        "type": "output",
        "description": "Complementary differential clock output B3* (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutB_TYPE pins."
      },
      {
        "number": "28",
        "name": "CLKoutB3",
        "type": "output",
        "description": "Differential clock output B3 (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutB_TYPE pins."
      },
      {
        "number": "29",
        "name": "VCCOB",
        "type": "power_in",
        "description": "Output buffer supply for bank B, operating at 3.3 V or 2.5 V (±5%); VCCOB pins are internally connected and must not exceed VCC."
      },
      {
        "number": "30",
        "name": "CLKoutB2*",
        "type": "output",
        "description": "Complementary differential clock output B2* (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutB_TYPE pins."
      },
      {
        "number": "31",
        "name": "CLKoutB2",
        "type": "output",
        "description": "Differential clock output B2 (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutB_TYPE pins."
      },
      {
        "number": "32",
        "name": "VCCOB",
        "type": "power_in",
        "description": "Output buffer supply for bank B, operating at 3.3 V or 2.5 V (±5%); VCCOB pins are internally connected and must not exceed VCC."
      },
      {
        "number": "33",
        "name": "CLKoutB1*",
        "type": "output",
        "description": "Complementary differential clock output B1* (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutB_TYPE pins."
      },
      {
        "number": "34",
        "name": "CLKoutB1",
        "type": "output",
        "description": "Differential clock output B1 (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutB_TYPE pins."
      },
      {
        "number": "35",
        "name": "CLKoutB0*",
        "type": "output",
        "description": "Complementary differential clock output B0* (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutB_TYPE pins."
      },
      {
        "number": "36",
        "name": "CLKoutB0",
        "type": "output",
        "description": "Differential clock output B0 (LVPECL, LVDS, HCSL, or high-Z), with the type set by the CLKoutB_TYPE pins."
      },
      {
        "number": "37",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "38",
        "name": "NC",
        "type": "unconnected",
        "description": "Internally not connected; may be left floating, grounded, or tied to any potential within the absolute maximum supply voltage range."
      },
      {
        "number": "39",
        "name": "CLKoutB_TYPE1",
        "type": "input",
        "description": "CMOS control input with internal pull-down that selects the bank B output buffer type together with CLKoutB_TYPE0."
      },
      {
        "number": "40",
        "name": "CLKin1",
        "type": "input",
        "description": "Universal clock input 1, accepting differential or single-ended signals and operating up to 3.1 GHz."
      },
      {
        "number": "41",
        "name": "CLKin1*",
        "type": "input",
        "description": "Complementary universal clock input 1*, used with CLKin1 for differential operation or biased externally for single-ended operation."
      },
      {
        "number": "42",
        "name": "VCC",
        "type": "power_in",
        "description": "Core and input buffer block supply, operating at 3.3 V; bypass with a 0.1 µF low-ESR capacitor placed close to each VCC pin."
      },
      {
        "number": "43",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "44",
        "name": "REFout",
        "type": "output",
        "description": "LVCMOS reference output referenced to VCCOC, enabled by pulling REFout_EN high and disabled (high-Z) when REFout_EN is low."
      },
      {
        "number": "45",
        "name": "VCCOC",
        "type": "power_in",
        "description": "Output buffer supply for the REFout output, operating at 3.3 V or 2.5 V (±5%)."
      },
      {
        "number": "46",
        "name": "REFout_EN",
        "type": "input",
        "description": "CMOS REFout enable input with internal pull-down, synchronized internally to the selected input clock to avoid glitches."
      },
      {
        "number": "47",
        "name": "CLKoutA_TYPE1",
        "type": "input",
        "description": "CMOS control input with internal pull-down that selects the bank A output buffer type together with CLKoutA_TYPE0."
      },
      {
        "number": "48",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "49",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin function table on page 4 lists both CLKin1 and CLKin1* as pin 40. Pin 40 is assigned to CLKi; The exposed pad is listed as 'DAP' rather than a numbered pin. It is included as a GND power_in entr; Supply pins VCCOA, VCCOB and VCCOC are listed as 3.3 V or 2.5 V (±5%) and do not have a single fixed",
          "exposed pad 49 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 27,
        "cost_usd": 0.1836,
        "at": "2026-10-07T22:29:58"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/lmk00301",
        "pages": 45,
        "sha256": "6962bb9414ac1c54",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "lmk00301sqx.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lmk00301sqx-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "66e8198ed5336b9d54472c5354c7a7d258a6357d46f01b6ba895376e3739cd72",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}