component
LM51561HPWPR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-14-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LM51561HPWPR
Texas Instruments · DC-DC Converters · HTSSOP-14-EP
LM51561HPWPR from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BIAS | power_in | Supply voltage input to the VCC regulator; connect bypass capacitor to PGND. |
| 2 | NC | unconnected | No electrical contact. |
| 3 | VCC | power_out | Output of internal VCC regulator and MOSFET driver supply voltage; connect ceramic bypass capacitor to PGND. |
| 4 | GATE | output | N-channel MOSFET gate drive output; connect directly to MOSFET gate through short, low inductance path. |
| 5 | PGND | power_in | Power ground pin; connect directly to ground connection of sense resistor through low inductance wide and short path. |
| 6 | AGND | power_in | Analog ground pin; connect directly to analog ground plane through wide and short path. |
| 7 | CS | input | Current sense input pin; connect to positive side of current sense resistor through short path. |
| 8 | COMP | output | Output of internal transconductance error amplifier; connect loop compensation components between pin and ground plane. |
| 9 | DITHOFF | input | Spread spectrum selection pin; connect to VCC to disable internal spread spectrum (clock dithering), connect to AGND to enable. |
| 10 | FB | input | Inverting input of error amplifier; connect voltage divider from output to set output voltage in boost/SEPIC/non-isolated flyback topologies. |
| 11 | SS | input | Soft-start time programming pin; external capacitor and internal current source set ramp rate of internal error amplifier reference during soft start. |
| 12 | RT | input | Switching frequency setting pin; switching frequency is programmed by single resistor between RT and AGND. |
| 13 | PGOOD | output | Power-good indicator open-drain output; goes low if FB is below undervoltage threshold. |
| 14 | EN/UVLO/SYNC | input | Undervoltage lockout programming pin; converter startup and shutdown levels programmed through resistor divider; supports external clock synchronization via negative pulse. |
| 15 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-14-EP |
| Category | Power Management (PMIC) |
| Pins | 15 |
CAD (KiCad official)
- Symbol:
LM51561HPWPR - Footprint:
Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-14-EP (KiCad packages3D, STEP)
- 3D model files:
lm51561hpwpr-etched.step/lm51561hpwpr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm51561hpwpr.step/lm51561hpwpr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (47 pp, sha256
1c2afe6d19f818b2, retrieved 2026-10-05, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LM51561HPWPR
**Texas Instruments** · DC-DC Converters · HTSSOP-14-EP
LM51561HPWPR from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BIAS | power_in | Supply voltage input to the VCC regulator; connect bypass capacitor to PGND. |
| 2 | NC | unconnected | No electrical contact. |
| 3 | VCC | power_out | Output of internal VCC regulator and MOSFET driver supply voltage; connect ceramic bypass capacitor to PGND. |
| 4 | GATE | output | N-channel MOSFET gate drive output; connect directly to MOSFET gate through short, low inductance path. |
| 5 | PGND | power_in | Power ground pin; connect directly to ground connection of sense resistor through low inductance wide and short path. |
| 6 | AGND | power_in | Analog ground pin; connect directly to analog ground plane through wide and short path. |
| 7 | CS | input | Current sense input pin; connect to positive side of current sense resistor through short path. |
| 8 | COMP | output | Output of internal transconductance error amplifier; connect loop compensation components between pin and ground plane. |
| 9 | DITHOFF | input | Spread spectrum selection pin; connect to VCC to disable internal spread spectrum (clock dithering), connect to AGND to enable. |
| 10 | FB | input | Inverting input of error amplifier; connect voltage divider from output to set output voltage in boost/SEPIC/non-isolated flyback topologies. |
| 11 | SS | input | Soft-start time programming pin; external capacitor and internal current source set ramp rate of internal error amplifier reference during soft start. |
| 12 | RT | input | Switching frequency setting pin; switching frequency is programmed by single resistor between RT and AGND. |
| 13 | PGOOD | output | Power-good indicator open-drain output; goes low if FB is below undervoltage threshold. |
| 14 | EN/UVLO/SYNC | input | Undervoltage lockout programming pin; converter startup and shutdown levels programmed through resistor divider; supports external clock synchronization via negative pulse. |
| 15 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-14-EP |
| Category | Power Management (PMIC) |
| Pins | 15 |
## CAD (KiCad official)
- Symbol: `LM51561HPWPR`
- Footprint: `Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm`
- 3D model: HTSSOP-14-EP (KiCad packages3D, STEP)
- 3D model files: `lm51561hpwpr-etched.step` / `lm51561hpwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm51561hpwpr.step` / `lm51561hpwpr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5156h) (47 pp, sha256 `1c2afe6d19f818b2`, retrieved 2026-10-05, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lm51561hpwpr-datasheet.pdf)