component
LM51561HPWPR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-14-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# LM51561HPWPR++**Texas Instruments** · DC-DC Converters · HTSSOP-14-EP++LM51561HPWPR from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BIAS | power_in | Supply voltage input to the VCC regulator; connect bypass capacitor to PGND. |+| 2 | NC | unconnected | No electrical contact. |+| 3 | VCC | power_out | Output of internal VCC regulator and MOSFET driver supply voltage; connect ceramic bypass capacitor to PGND. |+| 4 | GATE | output | N-channel MOSFET gate drive output; connect directly to MOSFET gate through short, low inductance path. |+| 5 | PGND | power_in | Power ground pin; connect directly to ground connection of sense resistor through low inductance wide and short path. |+| 6 | AGND | power_in | Analog ground pin; connect directly to analog ground plane through wide and short path. |+| 7 | CS | input | Current sense input pin; connect to positive side of current sense resistor through short path. |+| 8 | COMP | output | Output of internal transconductance error amplifier; connect loop compensation components between pin and ground plane. |+| 9 | DITHOFF | input | Spread spectrum selection pin; connect to VCC to disable internal spread spectrum (clock dithering), connect to AGND to enable. |+| 10 | FB | input | Inverting input of error amplifier; connect voltage divider from output to set output voltage in boost/SEPIC/non-isolated flyback topologies. |+| 11 | SS | input | Soft-start time programming pin; external capacitor and internal current source set ramp rate of internal error amplifier reference during soft start. |+| 12 | RT | input | Switching frequency setting pin; switching frequency is programmed by single resistor between RT and AGND. |+| 13 | PGOOD | output | Power-good indicator open-drain output; goes low if FB is below undervoltage threshold. |+| 14 | EN/UVLO/SYNC | input | Undervoltage lockout programming pin; converter startup and shutdown levels programmed through resistor divider; supports external clock synchronization via negative pulse. |+| 15 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-14-EP |+| Category | Power Management (PMIC) |+| Pins | 15 |++## CAD (KiCad official)++- Symbol: `LM51561HPWPR`+- Footprint: `Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-14-EP (KiCad packages3D, STEP)+- 3D model files: `lm51561hpwpr-etched.step` / `lm51561hpwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm51561hpwpr.step` / `lm51561hpwpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5156h) (47 pp, sha256 `1c2afe6d19f818b2`, retrieved 2026-10-05, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm51561hpwpr-datasheet.pdf)
page.jsonadded+203@@ -0,0 +1,203 @@+{+ "slug": "lm51561hpwpr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, HTSSOP-14-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "lm51561hpwpr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm51561hpwpr.kicad_sym",+ "lm51561hpwpr.kicad_mod",+ "lm51561hpwpr.glb",+ "lm51561hpwpr.step",+ "lm51561hpwpr.lbr",+ "docs/hero.png",+ "docs/lm51561hpwpr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "lm51561hpwpr-hero.glb",+ "lm51561hpwpr-hero.overlay.json"+ ],+ "component": {+ "mpn": "LM51561HPWPR",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-14-EP",+ "pin_count": 15,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lm5156h",+ "parts": {+ "symbol": "lm51561hpwpr.kicad_sym",+ "footprint": "lm51561hpwpr.kicad_mod",+ "model_3d": "lm51561hpwpr-hero.glb",+ "model_3d_plain": "lm51561hpwpr.glb",+ "model_3d_step": "lm51561hpwpr-etched.step",+ "model_3d_step_plain": "lm51561hpwpr.step",+ "lbr": "lm51561hpwpr.lbr"+ },+ "distributor_links": {+ "lcsc": 2867851,+ "digikey": "296-LM51561HPWPRTR-ND",+ "mouser": "595-LM51561HPWPR"+ },+ "distributor_check": {+ "checked_at": "2026-10-05T19:08:58Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-LM51561HPWPRTR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-LM51561HPWPR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "BIAS",+ "type": "power_in",+ "description": "Supply voltage input to the VCC regulator; connect bypass capacitor to PGND."+ },+ {+ "number": "2",+ "name": "NC",+ "type": "unconnected",+ "description": "No electrical contact."+ },+ {+ "number": "3",+ "name": "VCC",+ "type": "power_out",+ "description": "Output of internal VCC regulator and MOSFET driver supply voltage; connect ceramic bypass capacitor to PGND."+ },+ {+ "number": "4",+ "name": "GATE",+ "type": "output",+ "description": "N-channel MOSFET gate drive output; connect directly to MOSFET gate through short, low inductance path."+ },+ {+ "number": "5",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground pin; connect directly to ground connection of sense resistor through low inductance wide and short path."+ },+ {+ "number": "6",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin; connect directly to analog ground plane through wide and short path."+ },+ {+ "number": "7",+ "name": "CS",+ "type": "input",+ "description": "Current sense input pin; connect to positive side of current sense resistor through short path."+ },+ {+ "number": "8",+ "name": "COMP",+ "type": "output",+ "description": "Output of internal transconductance error amplifier; connect loop compensation components between pin and ground plane."+ },+ {+ "number": "9",+ "name": "DITHOFF",+ "type": "input",+ "description": "Spread spectrum selection pin; connect to VCC to disable internal spread spectrum (clock dithering), connect to AGND to enable."+ },+ {+ "number": "10",+ "name": "FB",+ "type": "input",+ "description": "Inverting input of error amplifier; connect voltage divider from output to set output voltage in boost/SEPIC/non-isolated flyback topologies."+ },+ {+ "number": "11",+ "name": "SS",+ "type": "input",+ "description": "Soft-start time programming pin; external capacitor and internal current source set ramp rate of internal error amplifier reference during soft start."+ },+ {+ "number": "12",+ "name": "RT",+ "type": "input",+ "description": "Switching frequency setting pin; switching frequency is programmed by single resistor between RT and AGND."+ },+ {+ "number": "13",+ "name": "PGOOD",+ "type": "output",+ "description": "Power-good indicator open-drain output; goes low if FB is below undervoltage threshold."+ },+ {+ "number": "14",+ "name": "EN/UVLO/SYNC",+ "type": "input",+ "description": "Undervoltage lockout programming pin; converter startup and shutdown levels programmed through resistor divider; supports external clock synchronization via negative pulse."+ },+ {+ "number": "15",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 15 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 7,+ "cost_usd": 0.1008,+ "at": "2026-10-05T19:08:45"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm5156h",+ "pages": 47,+ "sha256": "1c2afe6d19f818b2",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 15,+ "described": 15,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}