# LDN3408ET1G

**LRC** · MOSFETs · SOT-23-6

LDN3408ET1G from LRC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G1 | input | Gate of MOSFET 1; gate-source voltage limited to ±12V with 2kV HBM ESD protection. |
| 2 | S2 | passive | Source of MOSFET 2. |
| 3 | G2 | input | Gate of MOSFET 2; gate-source voltage limited to ±12V with 2kV HBM ESD protection. |
| 4 | D2 | passive | Drain of MOSFET 2; drain-source voltage up to 30V, continuous drain current 2A. |
| 5 | S1 | passive | Source of MOSFET 1. |
| 6 | D1 | passive | Drain of MOSFET 1; drain-source voltage up to 30V, continuous drain current 2A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23-6 |
| Category | Transistors/Thyristors |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS |  |  | 30 | V | Ta=25℃ unless otherwise noted | 1 |
| Gate-Source Voltage | VGS | -12 |  | 12 | V | Printed as ±12 V | 1 |
| Drain Current-Continuous | ID |  |  | 2 | A | Ta=25℃ | 1 |
| Drain Current-Pulsed | IDM |  |  | 8 | A |  | 1 |
| Power Dissipation | PD |  |  | 1.25 | W | Ta=25℃; derate above 25℃ at 10 mW/℃ | 1 |
| Operating Junction and Storage Temperature Range | TJ,TSTG | -55 |  | 150 | ℃ |  | 1 |
| Typical Thermal resistance-Junction to Ambient | RθJA |  | 100 |  | ℃/W | Junction to ambient, typical as printed | 1 |
| Drain-Source Breakdown Voltage | BVDSS | 30 |  |  | V | VGS=0V, ID=250μA | 2 |
| Gate Threshold Voltage | VGS(th) | 0.6 |  | 1.4 | V | VDS=VGS, ID=250μA | 2 |
| Drain-Source On-State Resistance | RDS(ON) |  |  | 75 | mΩ | VGS=10V, ID=3A | 2 |
| Drain-Source On-State Resistance | RDS(ON) |  | 70 | 90 | mΩ | VGS=4.5V, ID=2A | 2 |
| Drain-Source On-State Resistance | RDS(ON) |  | 110 | 150 | mΩ | VGS=2.5V, ID=1A | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 1 | μA | VDS=30V, VGS=0V | 2 |
| Gate-Body Leakage Current | IGSS | -10 |  | 10 | μA | VGS=±12V, VDS=0V; printed as ±10 | 2 |
| Diode Forward Voltage | VSD |  | 0.8 | 1.2 | V | VGS=0V, IS=1.0A | 2 |

## CAD (KiCad official)

- Symbol: `LDN3408ET1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `ldn3408et1g-etched.step` / `ldn3408et1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ldn3408et1g.step` / `ldn3408et1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590226687842680832) (5 pp, sha256 `840fafed1d36a430`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ldn3408et1g-datasheet.pdf)