# IRL6372TRPBF

**Infineon Technologies** · MOSFETs · SO-8

IRL6372TRPBF from Infineon Technologies, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S2 | passive | Source of MOSFET 2 (second channel of the dual N-channel HEXFET, VDS 30 V). |
| 2 | G2 | input | Gate of MOSFET 2, gate-to-source voltage limited to ±12 V. |
| 3 | S1 | passive | Source of MOSFET 1 (first channel of the dual N-channel HEXFET, VDS 30 V). |
| 4 | G1 | input | Gate of MOSFET 1, gate-to-source voltage limited to ±12 V. |
| 5 | D1 | passive | Drain of MOSFET 1, shorted with pin 6, continuous drain current 8.1 A at TA = 25°C. |
| 6 | D1 | passive | Drain of MOSFET 1, shorted with pin 5, continuous drain current 8.1 A at TA = 25°C. |
| 7 | D2 | passive | Drain of MOSFET 2, shorted with pin 8, continuous drain current 8.1 A at TA = 25°C. |
| 8 | D2 | passive | Drain of MOSFET 2, shorted with pin 7, continuous drain current 8.1 A at TA = 25°C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDS |  |  | 30 | V |  | 1 |
| Gate-to-Source Voltage | VGS | -12 |  | 12 | V |  | 1 |
| Continuous Drain Current | ID |  |  | 8.1 | A | TA = 25°C, VGS @ 4.5V | 1 |
| Continuous Drain Current | ID |  |  | 6.5 | A | TA = 70°C, VGS @ 4.5V | 1 |
| Pulsed Drain Current | IDM |  |  | 65 | A |  | 1 |
| Power Dissipation | PD |  |  | 2 | W | TA = 25°C | 1 |
| Power Dissipation | PD |  |  | 1.3 | W | TA = 70°C | 1 |
| Linear Derating Factor |  |  |  | 0.02 | W/°C |  | 1 |
| Operating Junction and Storage Temperature Range | TJ, TSTG | -55 |  | 150 | °C |  | 1 |
| Drain-to-Source Breakdown Voltage | BVDSS | 30 |  |  | V | VGS = 0V, ID = 250µA | 2 |
| Static Drain-to-Source On-Resistance | RDS(on) |  | 14 | 17.9 | mΩ | VGS = 4.5V, ID = 8.1A | 2 |
| Static Drain-to-Source On-Resistance | RDS(on) |  | 17 | 23 | mΩ | VGS = 2.5V, ID = 6.5A | 2 |
| Gate Threshold Voltage | VGS(th) | 0.5 |  | 1.1 | V | VDS = VGS, ID = 10µA | 2 |
| Drain-to-Source Leakage Current | IDSS |  |  | 1 | µA | VDS = 24V, VGS = 0V | 2 |
| Drain-to-Source Leakage Current | IDSS |  |  | 150 | µA | VDS = 24V, VGS = 0V, TJ = 125°C | 2 |
| Gate-to-Source Forward Leakage | IGSS |  |  | 100 | nA | VGS = 12V | 2 |
| Gate-to-Source Reverse Leakage | IGSS |  |  | -100 | nA | VGS = -12V | 2 |
| Forward Transconductance | gfs | 30 |  |  | S | VDS = 10V, ID = 6.5A | 2 |
| Diode Forward Voltage | VSD |  |  | 1.2 | V | TJ = 25°C, IS = 6.5A, VGS = 0V | 2 |
| Reverse Recovery Time | trr |  | 13 | 20 | ns | TJ = 25°C, IF = 6.5A, VDD = 24V, di/dt = 100/µs | 2 |
| Reverse Recovery Charge | Qrr |  | 5.3 | 8 | nC | TJ = 25°C, IF = 6.5A, VDD = 24V, di/dt = 100/µs | 2 |
| Junction-to-Drain Lead | RθJL |  |  | 20 | °C/W |  | 2 |
| Junction-to-Ambient | RθJA |  |  | 62.5 | °C/W |  | 2 |

## CAD (KiCad official)

- Symbol: `IRL6372TRPBF`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `irl6372trpbf-etched.step` / `irl6372trpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `irl6372trpbf.step` / `irl6372trpbf.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588927514337427456) (9 pp, sha256 `fe170c1c64ce7996`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/irl6372trpbf-datasheet.pdf)