# IPB160N04S3-H2

**Infineon Technologies** · MOSFETs · TO-263-7

IPB160N04S3-H2 from Infineon Technologies, in a TO-263-7. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate. Insulated MOSFET control terminal; max VGS ±20 V, threshold VGS(th) 2.1-4.0 V (typ 3.0 V). Drives the N-channel enhancement-mode transistor on/off. |
| 2 | S | passive | Source. Common source terminal of the N-channel MOSFET; carries up to 160 A continuous drain-source current. Pins 2, 3, 5, 6, and 7 are all internally connected to the source. |
| 3 | S | passive | Source. Internally connected to pins 2, 5, 6, 7. Multiple source pins reduce package inductance and share current for the 160 A rated device. |
| 4 | D | passive | Drain. Also connected to the exposed thermal tab of the PG-TO263-7-3 package for heat-sinking and drain current conduction. Rated VDS = 40 V, ID = 160 A. |
| 5 | S | passive | Source. Internally connected to pins 2, 3, 6, 7. Multiple source pins reduce package inductance and share current for the 160 A rated device. |
| 6 | S | passive | Source. Internally connected to pins 2, 3, 5, 7. Multiple source pins reduce package inductance and share current for the 160 A rated device. |
| 7 | S | passive | Source. Internally connected to pins 2, 3, 5, 6. Multiple source pins reduce package inductance and share current for the 160 A rated device. |
| TAB | D | passive | Exposed drain tab of the PG-TO263-7-3 package. Electrically connected to pin 4 (Drain); provides the primary thermal path to the PCB copper pour (RthJC = 0.7 K/W typical). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | TO-263-7 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Ordering variants

Same part, different packaging or reel option.

- `IPB160N04S3-H2`

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Continuous drain current | ID |  |  | 160 | A | TC=25°C, VGS=10V | 1 |
| Continuous drain current | ID |  |  | 157 | A | TC=100°C, VGS=10V | 1 |
| Gate source voltage | VGS | -20 |  | 20 | V |  | 1 |
| Operating and storage temperature | Tj, Tstg | -55 |  | 175 | °C |  | 1 |
| Avalanche energy, single pulse | EAS |  |  | 898 | mJ | ID=80 A | 1 |
| Power dissipation | Ptot |  |  | 214 | W | TC=25°C | 1 |
| Pulsed drain current | ID,pulse |  |  | 640 | A | TC=25°C | 1 |
| Thermal resistance, junction - case | RthJC |  |  | 0.7 | K/W |  | 2 |
| Thermal resistance, junction - ambient, SMD version on PCB | RthJA |  |  | 62 | K/W | device on PCB, minimal footprint | 2 |
| Thermal resistance, junction - ambient, SMD version on PCB | RthJA |  |  | 40 | K/W | device on PCB, 6 cm2 cooling area | 2 |
| Drain-source breakdown voltage | V(BR)DSS | 40 |  |  | V | VGS=0 V, ID=1 mA | 2 |
| Gate threshold voltage | VGS(th) | 2.1 | 3 | 4 | V | VDS=VGS, ID=150 µA | 2 |
| Zero gate voltage drain current | IDSS |  |  | 1 | µA | VDS=40 V, VGS=0 V, Tj=25°C | 2 |
| Zero gate voltage drain current | IDSS |  |  | 100 | µA | VDS=40 V, VGS=0 V, Tj=125°C | 2 |
| Gate-source leakage current | IGSS |  |  | 100 | nA | VGS=20 V, VDS=0 V | 2 |
| Drain-source on-state resistance | RDS(on) |  | 1.6 | 2.1 | mΩ | VGS=10 V, ID=80 A | 2 |
| Input capacitance | Ciss |  | 7400 | 9600 | pF | VGS=0 V, VDS=25 V, f=1 MHz | 3 |
| Output capacitance | Coss |  | 2000 | 2600 | pF | VGS=0 V, VDS=25 V, f=1 MHz | 3 |
| Reverse transfer capacitance | Crss |  | 310 | 465 | pF | VGS=0 V, VDS=25 V, f=1 MHz | 3 |
| Gate to source charge | Qgs |  | 38 | 50 | nC | VDD=32 V, ID=80 A, VGS=0 to 10 V | 3 |
| Gate to drain charge | Qgd |  | 25 | 45 | nC | VDD=32 V, ID=80 A, VGS=0 to 10 V | 3 |
| Gate charge total | Qg |  | 110 | 145 | nC | VDD=32 V, ID=80 A, VGS=0 to 10 V | 3 |
| Diode continuous forward current | IS |  |  | 160 | A |  | 3 |
| Diode pulse current | IS,pulse |  |  | 640 | A |  | 3 |
| Diode forward voltage | VSD |  | 0.85 | 1.3 | V | VGS=0 V, IF=80 A, Tj=25°C | 2 |
| Turn-on delay time | td(on) |  | 30 |  | ns | VDD=20 V, VGS=10 V, ID=80 A, RG=3.3 Ω | 3 |
| Rise time | tr |  | 16 |  | ns | VDD=20 V, VGS=10 V, ID=80 A, RG=3.3 Ω | 3 |
| Turn-off delay time | td(off) |  | 46 |  | ns | VDD=20 V, VGS=10 V, ID=80 A, RG=3.3 Ω | 3 |
| Fall time | tf |  | 17 |  | ns | VDD=20 V, VGS=10 V, ID=80 A, RG=3.3 Ω | 3 |
| Gate plateau voltage | Vplateau |  | 5.2 |  | V |  | 3 |
| Reverse recovery time | trr |  | 60 |  | ns | VR=20 V, IF=50 A, diF/dt=100 A/µs, TC=25°C | 3 |
| Reverse recovery charge | Qrr |  | 95 |  | nC | VR=20 V, IF=50 A, diF/dt=100 A/µs, TC=25°C | 3 |

## CAD (KiCad official)

- Symbol: `IPB160N04S3-H2`
- Footprint: `Package_TO_SOT_SMD:TO-263-7_TabPin8`
- 3D model: TO-263-7 (KiCad packages3D, STEP)
- 3D model files: `ipb160n04s3-h2-etched.step` / `ipb160n04s3-h2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ipb160n04s3-h2.step` / `ipb160n04s3-h2.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588912288640208896) (9 pp, sha256 `5862f0f8ed4e41d9`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ipb160n04s3-h2-datasheet.pdf)