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Caleb Publish 1.0.0 59fbfb4 1mo ago

ESC_G431 v2.0.1 — Function

STM32G431 + DRV8300 three-phase ESC running AM32. 64 × 74 mm, 4-layer. Target motor EMAX PRO 2808-1350KV, 3–6S, 25.2 V max, 58.5 A, 1474 W.

Sense chain values and part numbers are in Pinout.md. Firmware constants are in Firmware.md.

AM32 target

Ship target: ADOM_ESC_G431 — the custom block in Firmware.md §3.1.

Closest existing AM32 target: SEQURE_G431 (and SEQURE_G431_CAN).

SEQURE_G431 this board
hardware group HARDWARE_GROUP_G4_D same
pin and channel defines — identical
USE_PULSE_OUT (RPM pin) defined defined
TARGET_VOLTAGE_DIVIDER 480 (48:1) 110 (11:1)
MILLIVOLT_PER_AMP 5 25

The other four G431 targets do not define USE_PULSE_OUT; PB10 would sit analog/high-Z.

SEQURE_G431 spins the motor as-is with no driver work. Its voltage and current telemetry read wrong until the custom block is used — only the plumbing is shared.

E-stop — PB12, TIM1_BKIN (PC-13)

AF6, active low. A break event clears MOE in TIM1_BDTR, and with AOE = 0 it latches: outputs stay dead until firmware re-enables MOE or the MCU resets.

  • 10 k pull-up to +3V3 — idle high = run, so the ESC runs standalone with no harness
  • 100 nF at the pin plus TIM1's digital BKF filter
  • Not fail-safe on wire break; link loss is covered by AM32's 0.5 s DSHOT timeout

BOOT0

PB8 / pin 45 has R14 10 k to GND and is routed nowhere.

AN2606 Rev 61 Pattern 15, which the G431 uses, has no "flash empty" clause — a blank part will not self-enter the bootloader. The only entry is BOOT0 high at reset, so ROM DFU requires physical access.

The ROM bootloader's USART is PA9/PA10, which on this board are DRV8300 gate inputs. The FC's UART on PB6/PB7 cannot reach it; USB is the only ROM path.