---
name: eda-component-placement
description: >-
  Calculate PCB component placement from nets, footprints, power paths and mechanical interfaces. Use when asked to move all components off the board, place my PCB, optimize placement, preserve connector grids, or compare layout symmetry.
user-invocable: true
---
Parent skill: eda-engineering

# Calculate and verify component placement

Work on a saved copy. Inventory the real outline, layers, element and net identities, pad geometry,
rotations, footprint bodies, courtyard/keepout data and 3D envelopes. Ask which positions may move.
Never infer that electrical connectivity permits moving mounting holes, edge connectors or
daughterboard mating patterns.

For Adom Molecules, consult the current Molecule and contact standards and source module
documentation. Preserve the required corner contacts and grid, orientation/polarity and relative
mating pattern of stackable modules. Distinguish a nest/interface footprint from the actual
daughterboard envelope: a valid 2D mating grid does not prove installed clearance or assembly
access.

Inspect the functional groups first: power entry/protection, switches, charger/regulator, inductor,
decoupling, sensitive feedback/sense, digital interfaces and external contacts. Use component
datasheets and board-specific load constraints. Identify exposed pads, existing thermal-via fields
and high-loss/high-current parts before consuming their copper space. Keep fast current loops and
their returns compact; keep switching nodes away from sensitive sensing. Do not claim quantified
improvement without an appropriate model.

Define hard constraints separately from objectives. Hard constraints include board boundary,
keepouts, required interfaces, pad/body clearances, orientation and assembly access. Objectives can
include connection length, feasible escape paths, via count, power-loop geometry, copper continuity,
symmetry, alignment and legible grouping. State the priorities. Symmetry is a useful human-facing
objective; sacrificing it should be an explicit tradeoff, not an unexamined artifact.

Place constrained interfaces and critical component clusters, then remaining parts. Reserve escape
corridors before dense packing. Evaluate body and pad geometry after rotation; refine broad
bounding-box checks with actual outlines where necessary. Search multiple placements or improve a
candidate iteratively. A selected heuristic candidate is not a global optimum.

Use joint escape assignment for congested fine-pitch pins: independent nearest-via choices can
consume each other's exits. Couple placement feedback to routing failures and thermal bottlenecks.
Keep trial candidates separate; only commit an accepted placement to the visible final replay.

Read back the native element positions and rotations, net membership and outline. Audit
interface/grid requirements. Compare original and new coordinates for the explanation. If footprint
drills or contact definitions were updated, record those as separate changes. Finish with native 3D
assembly review and native DRC after routing, not just a placement screenshot.