skill
EDA Skillpack
Public Made by Adomby adom
All skills for all EDA capabilities across the Adom ecosystem.
main
John Lauer
Add Fable 5.1 BQ25792 independent re-route example (side-by-side video, evidence, four shared skills)
9458d54
28d ago
Planner iteration history (all logs preserved under planner/out/)
| run | wall s | nets ok/50 | partial nets | segments | vias | off-angle | exact clearance viol. | exact split nets | change |
|---|---|---|---|---|---|---|---|---|---|
| v1 | 859.0 | 44 | ILIM_HIZ, PROG, ACDRV2, !INT, !CE, !QON | 335 | 54 | 0 | 38 | 13 | first pass; exact check found same-net hugging counted as connection |
| v2 | 977.7 | 47 | !QON, ACDRV2, PGND | 343 | 49 | 0 | 2 | 26 | same-net 0.25 spacing, raster margins, IC1 signals before power |
| v3 | - | - | (run stopped before completion) | - | - | - | - | - | exact target masks (stub of source pad was counted as target) + repair pass (killed, superseded) |
| v4 | - | - | (run stopped before completion) | - | - | - | - | - | via mask relaxed, fan-out order (killed: BAT wide escape walled !INT) |
| v5 | - | - | (run stopped before completion) | - | - | - | - | - | wide escapes stay narrow 1.8 mm (killed: search state blow-up) |
| v6 | 231.9 | 42 | ILIM_HIZ, PROG, !INT, ACDRV1, VBUS, REGN, VAC2, VAC1 | 473 | 56 | 0 | - | - | A* state keyed on cell only (8x fewer states) |
| v7 | 294.1 | 45 | PROG, !INT, BATP, REGN, VAC2 | 491 | 76 | 0 | - | - | conservative raster, 0.15 mm pin stubs, 0.4/0.2 signal vias, cheaper fan-out vias |
| v8 | 97.6 | 47 | PROG, BATP, VAC2 | 500 | 78 | 0 | 2 | 20 | strict-inequality dilation |
| v9 | - | - | (run stopped before completion) | - | - | - | - | - | dual raster (exact + clearance), fan-out order per IC1 side (v9 killed/relaunched as v9b) |
| v9 | 148.0 | 44 | ACDRV1, !QON, !CE, VAC2, D_P, D_N | 446 | 71 | 0 | - | - | dual raster (exact + clearance), fan-out order per IC1 side (v9 killed/relaunched as v9b) |
| v10 | 461.5 | 45 | ACDRV1, REGN, VAC1, D_P, D_N | 473 | 79 | 0 | - | - | reserved escape corridors on L1 |
| v11 | 414.0 | 47 | VAC2, D_P, D_N | 465 | 75 | 0 | 1 | 25 | half-cell padding, 0.15 mm IC1 signal nets, corridor release |
| v12 | 244.5 | 49 | D_N | 489 | 69 | 0 | 3 | 2 | raster triple-dilation bug fixed (exact raster was 2 cells fat) |
| v13 | 563.6 | 47 | !INT, REGN, VAC2 | 538 | 71 | 0 | - | - | D_N before D_P, margin 0.02 (killed, superseded) |
| v14 | 564.6 | 47 | !INT, REGN, VAC2 | 541 | 71 | 4 | 1 | 3 | corner-pad joiners, edge keep-in fix |
| v15 | 504.9 | 47 | !INT, REGN, VAC2 | 545 | 71 | 0 | 1 | 3 | exact dog-bone repair, L-shaped joiners |
| v16 | - | - | (run stopped before completion) | - | - | - | - | - | inner-layer via corridors, VAC2 before VAC1, corner-pad escapes |
# Planner iteration history (all logs preserved under planner/out/)
| run | wall s | nets ok/50 | partial nets | segments | vias | off-angle | exact clearance viol. | exact split nets | change |
|---|---|---|---|---|---|---|---|---|---|
| v1 | 859.0 | 44 | ILIM_HIZ, PROG, ACDRV2, !INT, !CE, !QON | 335 | 54 | 0 | 38 | 13 | first pass; exact check found same-net hugging counted as connection |
| v2 | 977.7 | 47 | !QON, ACDRV2, PGND | 343 | 49 | 0 | 2 | 26 | same-net 0.25 spacing, raster margins, IC1 signals before power |
| v3 | - | - | (run stopped before completion) | - | - | - | - | - | exact target masks (stub of source pad was counted as target) + repair pass (killed, superseded) |
| v4 | - | - | (run stopped before completion) | - | - | - | - | - | via mask relaxed, fan-out order (killed: BAT wide escape walled !INT) |
| v5 | - | - | (run stopped before completion) | - | - | - | - | - | wide escapes stay narrow 1.8 mm (killed: search state blow-up) |
| v6 | 231.9 | 42 | ILIM_HIZ, PROG, !INT, ACDRV1, VBUS, REGN, VAC2, VAC1 | 473 | 56 | 0 | - | - | A* state keyed on cell only (8x fewer states) |
| v7 | 294.1 | 45 | PROG, !INT, BATP, REGN, VAC2 | 491 | 76 | 0 | - | - | conservative raster, 0.15 mm pin stubs, 0.4/0.2 signal vias, cheaper fan-out vias |
| v8 | 97.6 | 47 | PROG, BATP, VAC2 | 500 | 78 | 0 | 2 | 20 | strict-inequality dilation |
| v9 | - | - | (run stopped before completion) | - | - | - | - | - | dual raster (exact + clearance), fan-out order per IC1 side (v9 killed/relaunched as v9b) |
| v9 | 148.0 | 44 | ACDRV1, !QON, !CE, VAC2, D_P, D_N | 446 | 71 | 0 | - | - | dual raster (exact + clearance), fan-out order per IC1 side (v9 killed/relaunched as v9b) |
| v10 | 461.5 | 45 | ACDRV1, REGN, VAC1, D_P, D_N | 473 | 79 | 0 | - | - | reserved escape corridors on L1 |
| v11 | 414.0 | 47 | VAC2, D_P, D_N | 465 | 75 | 0 | 1 | 25 | half-cell padding, 0.15 mm IC1 signal nets, corridor release |
| v12 | 244.5 | 49 | D_N | 489 | 69 | 0 | 3 | 2 | raster triple-dilation bug fixed (exact raster was 2 cells fat) |
| v13 | 563.6 | 47 | !INT, REGN, VAC2 | 538 | 71 | 0 | - | - | D_N before D_P, margin 0.02 (killed, superseded) |
| v14 | 564.6 | 47 | !INT, REGN, VAC2 | 541 | 71 | 4 | 1 | 3 | corner-pad joiners, edge keep-in fix |
| v15 | 504.9 | 47 | !INT, REGN, VAC2 | 545 | 71 | 0 | 1 | 3 | exact dog-bone repair, L-shaped joiners |
| v16 | - | - | (run stopped before completion) | - | - | - | - | - | inner-layer via corridors, VAC2 before VAC1, corner-pad escapes |