component

DRV8802QPWPRQ1

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Texas Instruments Motor Driver ICs, HTSSOP-28-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower supply chipdrv8802qpwprq1factory-2.0.0extractor-text

Verified DRV8802QPWPRQ1

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 29 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DRV8802QPWPRQ1 · HTSSOP-28-EP · 29 pins
  • ✓copper: 29 copper pads, none touching another net
  • ✓datasheet: all 29 pin names found in the 27-page datasheet
  • ✓distributor: lcsc C701791, digikey 296-40075-2-ND, mouser 595-DRV8802QPWPRQ1
  • ✓family: TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-gbdz2r6l/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.23)
  • ✓pads: 29 pins = 29 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 29 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ drv8802qpwprq1.kicad_sym✓ drv8802qpwprq1.kicad_mod✓ drv8802qpwprq1.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers drv8802qpwprq1: viewers · Ray
drv8802qpwprq1-etched.glb Publish 0.1.0 · Ray
drv8802qpwprq1-etched.step drv8802qpwprq1: factory component page (tier=mfr) · Ray
drv8802qpwprq1-hero.glb drv8802qpwprq1: hero GLB from the etched model (keeps the MPN mark) · Ray
drv8802qpwprq1-hero.overlay.json Publish 0.1.0 · Ray
drv8802qpwprq1.glb Publish 0.1.0 · Ray
drv8802qpwprq1.kicad_mod Publish 0.1.0 · Ray
drv8802qpwprq1.kicad_sym Publish 0.1.0 · Ray
drv8802qpwprq1.lbr Publish 0.1.0 · Ray
drv8802qpwprq1.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 29 pins · Ray

DRV8802QPWPRQ1

Texas Instruments · Motor Driver ICs · HTSSOP-28-EP

DRV8802QPWPRQ1 from Texas Instruments, in a HTSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CP1 bidirectional Charge pump flying capacitor; connect a 0.01-µF 50-V capacitor between CP1 and CP2.
2 CP2 bidirectional Charge pump flying capacitor; connect a 0.01-µF 50-V capacitor between CP1 and CP2.
3 VCP bidirectional High-side gate drive voltage; connect a 0.1-µF 16-V ceramic capacitor and a 1-MΩ resistor to VMx.
4 VMA power_in Bridge A power supply; connect to the motor supply (8 to 45 V), and both VMx pins must be connected to the same supply.
5 AOUT1 output Bridge A output 1; connect to motor winding A.
6 ISENA bidirectional Bridge A ground and current sense; connect to the current sense resistor for bridge A (sense pin voltage limit −0.3 V to 0.8 V).
7 AOUT2 output Bridge A output 2; connect to motor winding A.
8 BOUT2 output Bridge B output 2; connect to motor winding B.
9 ISENB bidirectional Bridge B ground and current sense; connect to the current sense resistor for bridge B (sense pin voltage limit −0.3 V to 0.8 V).
10 BOUT1 output Bridge B output 1; connect to motor winding B.
11 VMB power_in Bridge B power supply; connect to the motor supply (8 to 45 V), and both VMx pins must be connected to the same supply.
12 AVREF input Bridge A current set reference input; the reference voltage sets winding current and can be driven by an external DAC for microstepping or tied to V3P3OUT (VREF input 1 to 3.5 V).
13 BVREF input Bridge B current set reference input; the reference voltage sets winding current and can be driven by an external DAC for microstepping or tied to V3P3OUT (VREF input 1 to 3.5 V).
14 GND power_in Device ground.
15 V3P3OUT power_out 3.3-V regulator output; bypass to GND with a 0.47-µF 6.3-V ceramic capacitor; can be used to supply VREF (load current 1 mA max).
16 nRESET input Active-low reset input that initializes internal logic and disables the H-bridge outputs; all inputs are ignored while active.
17 nSLEEP input Sleep mode input; logic high enables the device and logic low puts it into low-power sleep mode.
18 nFAULT output Open-drain fault output that is logic low when in a fault condition (overtemperature, overcurrent); output low voltage 0.5 V max at 5 mA.
19 DECAY input Decay mode select; logic low selects slow decay (brake) and logic high selects fast decay (coast) for both H-bridges.
20 APHASE input Bridge A phase (direction) input; logic high sets AOUT1 high and AOUT2 low.
21 AENBL input Bridge A enable input; logic high enables bridge A.
22 BENBL input Bridge B enable input; logic high enables bridge B.
23 BPHASE input Bridge B phase (direction) input; logic high sets BOUT1 high and BOUT2 low.
24 AI0 input Bridge A current set bit 0; with AI1 sets bridge A current to 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0%.
25 AI1 input Bridge A current set bit 1; with AI0 sets bridge A current to 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0%.
26 BI0 input Bridge B current set bit 0; with BI1 sets bridge B current to 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0%.
27 BI1 input Bridge B current set bit 1; with BI0 sets bridge B current to 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0%.
28 GND power_in Device ground.
29 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-28-EP
Category Power Supply Chip
Pins 29

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply voltage V(VMx) -0.3 47 V 5
Charge pump voltage VCP, CP1, CP2 -0.3 V 5
Digital pin voltage -0.5 7 V xPHASE, xENBL, nSLEEP, nFAULT, nRESET, xI0, xI1, DECAY 5
Reference input voltage V(xVREF) -0.3 4 V 5
Sense pin voltage V(ISENx) -0.3 0.8 V 5
H-bridge output continuous current 1.6 A Continuous motor drive; power dissipation and thermal limits must be observed 5
Operating virtual junction temperature TJ -40 150 °C 5
Operating ambient temperature TA -40 125 °C 5
Storage temperature range Tstg -60 150 °C 5
Electrostatic discharge, human body model V(ESD) -2000 2000 V Human body model (HBM), per AEC Q100-002 5
Electrostatic discharge, charged device model, corner pins V(ESD) -750 750 V Charged device model (CDM), per AEC Q100-011; corner pins (1, 14, 15, and 28) 5
Electrostatic discharge, charged device model, other pins V(ESD) -500 500 V Charged device model (CDM), per AEC Q100-011; other pins 5
Power supply voltage V(VMx) 8.2 45 V 5
VREF input voltage V(xVREF) 1 3.5 V 5
H-bridge output current I(OUT1x, OUT2x) 1.6 A 5
V3P3OUT load current IL(V3P3OUT) 1 mA 5
VMx operating supply current I(VMx) 5 8 mA V(VMx) = 24 V, ƒ(PWM) < 50 kHz 6
VMx sleep mode supply current I(VMx_Q) 10 20 μA V(VMx) = 24 V 6
VMx undervoltage lockout voltage V(UVLO) 7.8 8.2 V V(VMx) rising 6
V3P3OUT voltage V(V3P3OUT) 3.1 3.3 3.5 V IO = 0 to 1 mA 6
Input low voltage VIL 0.7 V 6
Input high voltage VIH 2.1 V 6
Input hysteresis Vhys 0.45 V 6
Input low current IIL -20 20 μA VI = 0 6
Input high current IIH 100 μA VI = 3.3 V 6
nFAULT output low voltage VOL 0.5 V IO = 5 mA 6
Output high leakage current IOH 1 μA VO = 3.3 V 6
DECAY input low threshold voltage VIL 0 0.8 V For slow decay mode 6
DECAY input high threshold voltage VIH 2 V For fast decay mode 6
DECAY input current II -40 40 µA 6
HS FET on resistance rDS(on) 0.63 Ω VM = 24 V, IO = 1 A, TJ = 25°C 6
HS FET on resistance rDS(on) 0.76 0.9 Ω VM = 24 V, IO = 1 A, TJ = 85°C 6
HS FET on resistance rDS(on) 0.85 1 Ω VM = 24 V, IO = 1 A, TJ = 125°C 6
LS FET on resistance rDS(on) 0.65 Ω VM = 24 V, IO = 1 A, TJ = 25°C 6
LS FET on resistance rDS(on) 0.78 0.9 Ω VM = 24 V, IO = 1 A, TJ = 85°C 6
LS FET on resistance rDS(on) 0.85 1 Ω VM = 24 V, IO = 1 A, TJ = 125°C 6
Off-state leakage current Ilkg(OFF) -20 20 μA 6
Internal PWM frequency ƒ(PWM) 50 kHz 6
Current-sense blanking time t(blank) 3.75 μs 6
Rise time tr 100 360 ns VM = 24 V 6
Fall time tf 80 250 ns VM = 24 V 6
Dead time t(dead) 400 ns 6
Overcurrent protection trip level I(OCP) 1.8 5 A 6
Thermal shutdown temperature T(SD) 150 160 180 °C Die temperature 6
xVREF input current I(xVREF) -3 3 μA V(xVREF) = 3.3 V 6
xISENSE trip voltage, 100% current setting V(TRIP) 635 660 685 mV V(xVREF) = 3.3 V, 100% current setting 6
xISENSE trip voltage, 71% current setting V(TRIP) 445 469 492 mV V(xVREF) = 3.3 V, 71% current setting 6
xISENSE trip voltage, 38% current setting V(TRIP) 225 251 276 mV V(xVREF) = 3.3 V, 38% current setting 6
Current sense amplifier gain G(ISENx) 5 V/V Reference only 6
Junction-to-ambient thermal resistance RθJA 38.9 °C/W PWP package, 28 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 23.3 °C/W PWP package, 28 pins 5
Junction-to-board thermal resistance RθJB 21.2 °C/W PWP package, 28 pins 5
Junction-to-top characterization parameter ψJT 0.8 °C/W PWP package, 28 pins 5
Junction-to-board characterization parameter ψJB 20.9 °C/W PWP package, 28 pins 5
Junction-to-case (bottom) thermal resistance RθJC(bot) 2.6 °C/W PWP package, 28 pins 5

CAD (KiCad official)

  • Symbol: DRV8802QPWPRQ1
  • Footprint: Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm
  • 3D model: HTSSOP-28-EP (KiCad packages3D, STEP)
  • 3D model files: drv8802qpwprq1-etched.step / drv8802qpwprq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv8802qpwprq1.step / drv8802qpwprq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 8ef179cf20753a85, retrieved 2026-10-30, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF