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DRV8706SQRHBRQ1

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Texas Instruments Brushed DC Motor Drivers, VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentmotor driver icsdrv8706sqrhbrq1factory-2.0.0extractor-text

Verified DRV8706SQRHBRQ1

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DRV8706SQRHBRQ1 · VQFN-32(5x5) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 71-page datasheet
  • ✓distributor: lcsc C5218851, digikey 296-DRV8706SQRHBRQ1TR-ND, mouser 595-DRV8706SQRHBRQ1
  • ✓family: QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-awzrxq5t/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ drv8706sqrhbrq1.kicad_sym✓ drv8706sqrhbrq1.kicad_mod✓ drv8706sqrhbrq1.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers drv8706sqrhbrq1: viewers · Ray
drv8706sqrhbrq1-etched.glb Publish 0.1.0 · Ray
drv8706sqrhbrq1-etched.step drv8706sqrhbrq1: factory component page (tier=mfr) · Ray
drv8706sqrhbrq1-hero.glb drv8706sqrhbrq1: hero GLB from the etched model (keeps the MPN mark) · Ray
drv8706sqrhbrq1-hero.overlay.json Publish 0.1.0 · Ray
drv8706sqrhbrq1.glb Publish 0.1.0 · Ray
drv8706sqrhbrq1.kicad_mod Publish 0.1.0 · Ray
drv8706sqrhbrq1.kicad_sym Publish 0.1.0 · Ray
drv8706sqrhbrq1.lbr Publish 0.1.0 · Ray
drv8706sqrhbrq1.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 33 pins · Ray

DRV8706SQRHBRQ1

Texas Instruments · Brushed DC Motor Drivers · VQFN-32(5x5)

DRV8706SQRHBRQ1 from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground that must be connected to the system ground.
2 DVDD power_in Device logic and digital output power supply input, decoupled with a 1.0-µF, 6.3-V ceramic capacitor between DVDD and GND.
3 nSCS input Serial chip select; a logic low enables serial interface communication, with an internal pullup resistor.
4 SCLK input Serial clock input; serial data is shifted out and captured on the corresponding rising and falling edges of this pin, with an internal pulldown resistor.
5 SDI input Serial data input; data is captured on the falling edge of SCLK, with an internal pulldown resistor.
6 SDO output Serial data output; data is shifted out on the rising edge of SCLK and the output is push-pull.
7 IN1/EN input Half-bridge control input, see PWM modes for details, with an internal pulldown.
8 nHIZ1 input Half-bridge control input, see PWM modes for details, with an internal pulldown.
9 IN2/PH input Half-bridge control input, see PWM modes for details, with an internal pulldown.
10 nHIZ2 input Half-bridge control input, see PWM modes for details, with an internal pulldown.
11 nSLEEP input Device enable pin; a logic low shuts down the device and enters sleep mode, with an internal pulldown resistor.
12 DRVOFF input Driver shutdown pin; a logic high pulls down both high-side and low-side gate driver outputs, with an internal pulldown resistor.
13 nFAULT output Fault indicator output that is pulled logic low to indicate a fault; open-drain and requires an external pullup resistor.
14 SO output Shunt amplifier output.
15 RSVD unconnected Reserved; connect to ground or leave disconnected.
16 AREF power_in External voltage reference and power supply for the current sense amplifiers, decoupled with a 0.1-µF, 6.3-V ceramic capacitor between AREF and AGND.
17 AGND power_in Device ground that must be connected to the system ground.
18 SP input Shunt amplifier positive input, connected to the positive terminal of the current shunt resistor.
19 SN input Shunt amplifier negative input, connected to the negative terminal of the current shunt resistor.
20 GH1 output High-side gate driver output, connected to the gate of the high-side power MOSFET.
21 SH1 input High-side source sense input, connected to the high-side power MOSFET source.
22 GL1 output Low-side gate driver output, connected to the gate of the low-side power MOSFET.
23 SL1 input Low-side MOSFET gate drive sense and power return, connected to system ground through a low impedance path.
24 SL2 input Low-side MOSFET gate drive sense and power return, connected to system ground through a low impedance path.
25 GL2 output Low-side gate driver output, connected to the gate of the low-side power MOSFET.
26 SH2 input High-side source sense input, connected to the high-side power MOSFET source.
27 GH2 output High-side gate driver output, connected to the gate of the high-side power MOSFET.
28 DRAIN input Bridge MOSFET drain voltage sense pin, connected to the common point of the high-side MOSFET drains.
29 PVDD power_in Device driver power supply input, connected to the bridge power supply with a 0.1-µF PVDD-rated ceramic capacitor and at least 10-µF bulk capacitance to GND.
30 VCP power_out Charge pump output, connected with a 1-µF, 16-V ceramic capacitor between VCP and PVDD.
31 CPH bidirectional Charge pump switching node, connected with a 100-nF, PVDD-rated ceramic capacitor between CPH and CPL.
32 CPL bidirectional Charge pump switching node, connected with a 100-nF, PVDD-rated ceramic capacitor between CPH and CPL.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32(5x5)
Category Motor Driver ICs
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Driver power supply pin voltage PVDD -0.3 40 V 6
MOSFET drain sense pin voltage DRAIN -0.3 40 V 6
Charge pump pin voltage VCP -0.3 55 V 6
Digital power supply pin voltage DVDD -0.3 5.75 V 6
Logic pin voltage DRVOFF, GAIN, IDRIVE, IN1/EN, IN2/PH, MODE, nHIZx, nSLEEP, nFAULT, nSCS, SCLK, SDI, VDS -0.3 5.75 V 6
Amplifier power supply and reference pin voltage AREF -0.3 5.75 V 6
Ambient temperature TA TA -40 125 °C 6
Junction temperature TJ TJ -40 150 °C 6
Storage temperature Tstg Tstg -65 150 °C 6
Driver power supply voltage PVDD VPVDD 4.9 37 V 7
High-side average gate-drive current GHx IHS 0 15 mA 7
Low-side average gate-drive current GLx ILS 0 15 mA 7
Digital power supply voltage DVDD VDVDD 3 5.5 V 7
Digital input voltage DRVOFF, IN1/EN, IN2/PH, nHIZx, nSLEEP, nSCS, SCLK, SDI VDIN 0 5.5 V 7
Digital output current SDO IDOUT 0 5 mA 7
Open drain pullup voltage nFAULT VOD 0 5.5 V 7
Open drain output current nFAULT IOD 0 5 mA 7
Amplifier reference supply voltage AREF VAREF 3 5.5 V 7
Shunt amplifier output current SO ISO 0 5 mA 7
Operating ambient temperature TA TA -40 125 °C 7
Operating junction temperature TJ TJ -40 150 °C 7
Junction-to-ambient thermal resistance RHB (VQFN) 32 pins RθJA 34.9 °C/W 7
Junction-to-case (bottom) thermal resistance RHB (VQFN) 32 pins RθJC(bot) 5.2 °C/W 7
Charge pump regulator voltage with respect to PVDD VVCP 9.5 10.5 11 V VPVDD ≥ 13 V, IVCP ≤ 15 mA 7
Charge pump regulator voltage with respect to PVDD VVCP 8.4 10 11 V VPVDD = 11 V, IVCP ≤ 15 mA 7
Charge pump regulator voltage with respect to PVDD VVCP 7 8 9 V VPVDD = 9 V, IVCP ≤ 11 mA 7
Charge pump regulator voltage with respect to PVDD VVCP 5.5 6 7 V VPVDD = 7 V, IVCP ≤ 7.5 mA 7
Charge pump regulator voltage with respect to PVDD VVCP 4.5 5 5.5 V VPVDD = 5.5 V, IVCP ≤ 5 mA 7
PVDD sleep mode current IPVDDQ 2.25 3 µA VPVDD, VDRAIN = 13.5 V, nSLEEP = 0 V, -40 ≤ TJ ≤ 85°C 7
DRAIN sleep mode current IDRAINQ 2 2.75 µA VPVDD, VDRAIN = 13.5 V, nSLEEP = 0 V, -40 ≤ TJ ≤ 85°C 7
DVDD sleep mode current IDVDDQ 2 3.5 µA VPVDD, VDRAIN = 13.5 V, nSLEEP = 0 V, -40 ≤ TJ ≤ 85°C 8
PVDD active mode current IPVDD 2 3 mA VPVDD, VDRAIN = 13.5 V, nSLEEP = 5 V 8
DRAIN active mode current IDRAIN 250 325 µA VPVDD, VDRAIN = 13.5 V, nSLEEP = 5 V, VDS_LVL ≤ 500 mV 8
DVDD active mode current IDVDD 3.5 5.5 mA VDVDD = 5 V, SDO = 0 V 8
Digital oscillator switching frequency fDVDD 14.25 MHz Primary frequency of spread spectrum. 8
Charge pump switching frequency fVCP 400 kHz Primary frequency of spread spectrum. 8
Input pulldown resistance RPD 50 100 150 kΩ To GND, DRVOFF, IN1/EN, IN2/PH, nHIZx, nSLEEP, SCLK, SDI 8
Input pullup resistance RPU 50 100 150 kΩ To DVDD, nSCS 8
Quad-level input 2 GAIN, MODE resistance to GND RQI2 44.65 47 49.35 kΩ Resistance to GND to set level 2 8
Six-level input 2 IDRIVE, VDS resistance to GND RSI2 28.5 30 31.5 kΩ Resistance to GND to set level 2 8
Six-level input 3 IDRIVE, VDS resistance to GND RSI3 95 100 105 kΩ Resistance to GND to set level 3 8
VDS overcurrent protection threshold SPI Device VDS_LVL 0.04 0.06 0.08 V VDS_LVL = 0000b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.06 0.08 0.1 V VDS_LVL = 0001b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.08 0.1 0.12 V VDS_LVL = 0010b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.1 0.12 0.14 V VDS_LVL = 0011b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.12 0.14 0.16 V VDS_LVL = 0100b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.14 0.16 0.18 V VDS_LVL = 0101b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.16 0.18 0.2 V VDS_LVL = 0110b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.18 0.2 0.22 V VDS_LVL = 0111b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.27 0.3 0.33 V VDS_LVL = 1000b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.36 0.4 0.44 V VDS_LVL = 1001b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.45 0.5 0.55 V VDS_LVL = 1010b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.54 0.6 0.66 V VDS_LVL = 1011b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.63 0.7 0.77 V VDS_LVL = 1100b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 0.9 1 1.1 V VDS_LVL = 1101b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 1.26 1.4 1.54 V VDS_LVL = 1110b 13
VDS overcurrent protection threshold SPI Device VDS_LVL 1.8 2 2.2 V VDS_LVL = 1111b 13
Thermal warning temperature TJ rising TOTW 130 150 170 °C TJ rising 13
Thermal shutdown temperature TJ rising TOTSD 150 170 190 °C TJ rising 13

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 19 SN I Analog Shunt amplifier negative input. Connect to negative terminal of the current shunt resistor. 5

CAD (KiCad official)

  • Symbol: DRV8706SQRHBRQ1
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: drv8706sqrhbrq1-etched.step / drv8706sqrhbrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv8706sqrhbrq1.step / drv8706sqrhbrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (71 pp, sha256 00149e19ad441e96, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF