component
DRV8353FSRTAR
Public Made by Adomby adom
Texas Instruments Brushless DC (BLDC) Motor Driver, WQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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drv8353fsrtar: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
0d3c8b3
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{
"slug": "drv8353fsrtar",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Brushless DC (BLDC) Motor Driver, WQFN-40-EP(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.",
"tags": [
"component",
"motor driver ics",
"drv8353fsrtar",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"drv8353fsrtar.kicad_sym",
"drv8353fsrtar.kicad_mod",
"drv8353fsrtar.glb",
"drv8353fsrtar.step",
"drv8353fsrtar.lbr",
"docs/hero.png",
"docs/drv8353fsrtar-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"component": {
"mpn": "DRV8353FSRTAR",
"manufacturer": "Texas Instruments",
"package": "WQFN-40-EP(6x6)",
"pin_count": 41,
"category": "Motor Driver ICs",
"subcategory": "Brushless DC (BLDC) Motor Driver",
"datasheet": "https://www.ti.com/cn/lit/gpn/drv8353f",
"parts": {
"symbol": "drv8353fsrtar.kicad_sym",
"footprint": "drv8353fsrtar.kicad_mod",
"model_3d": "drv8353fsrtar-etched.glb",
"model_3d_plain": "drv8353fsrtar.glb",
"model_3d_step": "drv8353fsrtar-etched.step",
"model_3d_step_plain": "drv8353fsrtar.step",
"lbr": "drv8353fsrtar.lbr"
},
"distributor_links": {
"lcsc": "C1518717"
},
"pins": [
{
"number": "1",
"name": "CPL",
"type": "output",
"description": "Charge pump switch node; connect 47nF external capacitor between CPH and CPL."
},
{
"number": "2",
"name": "CPH",
"type": "output",
"description": "Charge pump switch node; connect 47nF external capacitor between CPH and CPL."
},
{
"number": "3",
"name": "VM",
"type": "power_in",
"description": "Gate driver power supply input (9-75V recommended); connect 0.1µF bypass and ≥10µF bulk capacitor."
},
{
"number": "4",
"name": "VDRAIN",
"type": "input",
"description": "High side MOSFET drain sense input and charge pump reference (7-100V recommended)."
},
{
"number": "5",
"name": "VCP",
"type": "power_out",
"description": "Charge pump output (≈VDRAIN+10.5V); connect 1µF, 16V filter capacitor to VDRAIN."
},
{
"number": "6",
"name": "GHA",
"type": "output",
"description": "High side gate driver output for phase A; connect to high side MOSFET gate."
},
{
"number": "7",
"name": "SHA",
"type": "input",
"description": "High side source sense input for phase A; connect to high side MOSFET source."
},
{
"number": "8",
"name": "GLA",
"type": "output",
"description": "Low side gate driver output for phase A; connect to low side MOSFET gate."
},
{
"number": "9",
"name": "SPA",
"type": "input",
"description": "Low side source sense and shunt amplifier positive input for phase A; connect to MOSFET source and sense resistor high side."
},
{
"number": "10",
"name": "SNA",
"type": "input",
"description": "Shunt amplifier negative sense input for phase A; connect to current sense resistor low side."
},
{
"number": "11",
"name": "SNB",
"type": "input",
"description": "Shunt amplifier negative sense input for phase B; connect to current sense resistor low side."
},
{
"number": "12",
"name": "SPB",
"type": "input",
"description": "Low side source sense and shunt amplifier positive input for phase B; connect to MOSFET source and sense resistor high side."
},
{
"number": "13",
"name": "GLB",
"type": "output",
"description": "Low side gate driver output for phase B; connect to low side MOSFET gate."
},
{
"number": "14",
"name": "SHB",
"type": "input",
"description": "High side source sense input for phase B; connect to high side MOSFET source."
},
{
"number": "15",
"name": "GHB",
"type": "output",
"description": "High side gate driver output for phase B; connect to high side MOSFET gate."
},
{
"number": "16",
"name": "GHC",
"type": "output",
"description": "High side gate driver output for phase C; connect to high side MOSFET gate."
},
{
"number": "17",
"name": "SHC",
"type": "input",
"description": "High side source sense input for phase C; connect to high side MOSFET source."
},
{
"number": "18",
"name": "GLC",
"type": "output",
"description": "Low side gate driver output for phase C; connect to low side MOSFET gate."
},
{
"number": "19",
"name": "SPC",
"type": "input",
"description": "Low side source sense and shunt amplifier positive input for phase C; connect to MOSFET source and sense resistor high side."
},
{
"number": "20",
"name": "SNC",
"type": "input",
"description": "Shunt amplifier negative sense input for phase C; connect to current sense resistor low side."
},
{
"number": "21",
"name": "SOC",
"type": "output",
"description": "Shunt amplifier output for phase C; provides amplified current sense signal."
},
{
"number": "22",
"name": "SOB",
"type": "output",
"description": "Shunt amplifier output for phase B; provides amplified current sense signal."
},
{
"number": "23",
"name": "SOA",
"type": "output",
"description": "Shunt amplifier output for phase A; provides amplified current sense signal."
},
{
"number": "24",
"name": "VREF",
"type": "power_in",
"description": "Shunt amplifier reference voltage input (3-5.5V recommended); connect 0.1µF, 6.3V capacitor to AGND."
},
{
"number": "25",
"name": "AGND",
"type": "power_in",
"description": "Device analog ground; connect to system ground for circuit reference."
},
{
"number": "26",
"name": "nFAULT",
"type": "tri_state",
"description": "Fault indicator output (open-drain, active low); requires external pull-up resistor to VCC."
},
{
"number": "27",
"name": "SDO",
"type": "tri_state",
"description": "Serial data output (open-drain); data shifts out on SCLK rising edge, requires pull-up resistor."
},
{
"number": "28",
"name": "SDI",
"type": "input",
"description": "Serial data input; data captured on SCLK falling edge for SPI communication."
},
{
"number": "29",
"name": "SCLK",
"type": "input",
"description": "Serial clock input; synchronizes SPI data capture and output timing."
},
{
"number": "30",
"name": "nSCS",
"type": "input",
"description": "Serial chip select (active low); logic low enables SPI interface communication."
},
{
"number": "31",
"name": "ENABLE",
"type": "input",
"description": "Gate driver enable input; logic low activates low-power sleep mode, 8-40µs pulse resets faults."
},
{
"number": "32",
"name": "INHA",
"type": "input",
"description": "High side gate driver control input for phase A; directly controls high side gate output."
},
{
"number": "33",
"name": "INLA",
"type": "input",
"description": "Low side gate driver control input for phase A; directly controls low side gate output."
},
{
"number": "34",
"name": "INHB",
"type": "input",
"description": "High side gate driver control input for phase B; directly controls high side gate output."
},
{
"number": "35",
"name": "INLB",
"type": "input",
"description": "Low side gate driver control input for phase B; directly controls low side gate output."
},
{
"number": "36",
"name": "INHC",
"type": "input",
"description": "High side gate driver control input for phase C; directly controls high side gate output."
},
{
"number": "37",
"name": "INLC",
"type": "input",
"description": "Low side gate driver control input for phase C; directly controls low side gate output."
},
{
"number": "38",
"name": "DVDD",
"type": "power_out",
"description": "5V internal regulator output (±5% regulated); connect 1µF, 6.3V capacitor to GND (10mA max load)."
},
{
"number": "39",
"name": "GND",
"type": "power_in",
"description": "Device power ground; connect to system ground for proper circuit operation."
},
{
"number": "40",
"name": "VGLS",
"type": "power_out",
"description": "11V internal regulator output; connect 1µF, 16V capacitor to GND (25mA max, further regulated to 11V at GLx outputs)."
},
{
"number": "41",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.2",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.2",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-4-6",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"exposed pad 41 added from the footprint"
],
"pages_sent": 83,
"cost_usd": 0.998,
"at": "2026-09-22T00:45:03"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/drv8353f",
"pages": 83,
"sha256": "e84c59e0a37d8b2f",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 41,
"described": 41,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "drv8353fsrtar.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
6.0,
1.0
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "drv8353fsrtar-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
6.0,
1.0
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "6e4e0012ea35afde3987df73f022354959ec0ab5e60cd04b3ab47cbd83e71f71",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}