DP83640TVVX

{
  "schema_version": 1,
  "type": "component",
  "slug": "dp83640tvvx",
  "title": "DP83640TVVX",
  "brief": "Texas Instruments Ethernet Transceivers, LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "interface",
    "dp83640tvvx",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "DP83640TVVX",
    "manufacturer": "Texas Instruments",
    "package": "LQFP-48(7x7)",
    "pin_count": 48,
    "category": "Interface",
    "subcategory": "Ethernet Transceivers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dp83640",
    "parts": {
      "symbol": "dp83640tvvx.kicad_sym",
      "footprint": "dp83640tvvx.kicad_mod",
      "model_3d": "dp83640tvvx-etched.glb",
      "model_3d_plain": "dp83640tvvx.glb",
      "model_3d_step": "dp83640tvvx-etched.step",
      "model_3d_step_plain": "dp83640tvvx.step",
      "lbr": "dp83640tvvx.lbr"
    },
    "distributor_links": {
      "lcsc": "C544437"
    },
    "pins": [
      {
        "number": "1",
        "name": "TX_CLK",
        "type": "output",
        "description": "MII transmit clock output, 25 MHz in 100 Mb/s mode or 2.5 MHz in 10 Mb/s mode, with integrated 50-Ω signal termination."
      },
      {
        "number": "2",
        "name": "TX_EN",
        "type": "input",
        "description": "MII transmit enable active-high input indicating valid data on TXD[3:0]; RMII mode uses TXD[1:0]."
      },
      {
        "number": "3",
        "name": "TXD_0",
        "type": "input",
        "description": "MII transmit data input, accepts data synchronous to TX_CLK."
      },
      {
        "number": "4",
        "name": "TXD_1",
        "type": "input",
        "description": "MII transmit data input, accepts data synchronous to TX_CLK."
      },
      {
        "number": "5",
        "name": "TXD_2",
        "type": "input",
        "description": "MII transmit data input, accepts data synchronous to TX_CLK."
      },
      {
        "number": "6",
        "name": "TXD_3",
        "type": "input",
        "description": "MII transmit data input TXD[3]; RMII transmit data input TXD[1]; can be used as RMII_MAS strap pin."
      },
      {
        "number": "7",
        "name": "PWRDOWN/INTN",
        "type": "input",
        "description": "Active-low power down input; can be programmed as active-low interrupt output via MICR register."
      },
      {
        "number": "8",
        "name": "TCK",
        "type": "input",
        "description": "JTAG test clock input with weak internal pullup; maximum rate 25 MHz."
      },
      {
        "number": "9",
        "name": "TDO",
        "type": "output",
        "description": "JTAG test data output; can also function as GPIO10 for general-purpose I/O."
      },
      {
        "number": "10",
        "name": "TMS",
        "type": "input",
        "description": "JTAG test mode select input with weak internal pullup."
      },
      {
        "number": "11",
        "name": "TRST#",
        "type": "input",
        "description": "JTAG active-low asynchronous test reset input with weak internal pullup."
      },
      {
        "number": "12",
        "name": "TDI",
        "type": "input",
        "description": "JTAG test data input with weak internal pullup; can also function as GPIO11 for general-purpose I/O."
      },
      {
        "number": "13",
        "name": "RD-",
        "type": "bidirectional",
        "description": "Differential receive input (PMD input pair) configured for 100BASE-TX or 10BASE-T signaling; can be transmit output in Auto-MDIX mode or 100BASE-FX receive in fiber mode; requires 3.3-V bias."
      },
      {
        "number": "14",
        "name": "RD+",
        "type": "bidirectional",
        "description": "Differential receive input (PMD input pair) configured for 100BASE-TX or 10BASE-T signaling; can be transmit output in Auto-MDIX mode or 100BASE-FX receive in fiber mode; requires 3.3-V bias."
      },
      {
        "number": "15",
        "name": "CD_VSS",
        "type": "power_in",
        "description": "Analog ground for common-mode driver circuit."
      },
      {
        "number": "16",
        "name": "TD-",
        "type": "bidirectional",
        "description": "Differential transmit output (PMD output pair) configured for 10BASE-T or 100BASE-TX signaling; can be receive input in Auto-MDIX mode or 100BASE-FX transmit in fiber mode; requires 3.3-V bias."
      },
      {
        "number": "17",
        "name": "TD+",
        "type": "bidirectional",
        "description": "Differential transmit output (PMD output pair) configured for 10BASE-T or 100BASE-TX signaling; can be receive input in Auto-MDIX mode or 100BASE-FX transmit in fiber mode; requires 3.3-V bias."
      },
      {
        "number": "18",
        "name": "ANAVSS",
        "type": "power_in",
        "description": "Analog ground for bias and driver circuits."
      },
      {
        "number": "19",
        "name": "ANA33VDD",
        "type": "power_in",
        "description": "Analog VDD supply, 3.3 V ±0.3 V nominal."
      },
      {
        "number": "20",
        "name": "VREF",
        "type": "power_in",
        "description": "Bias resistor connection point; connect 4.87-kΩ ±1% resistor from VREF to GND for proper circuit biasing."
      },
      {
        "number": "21",
        "name": "GPIO1",
        "type": "bidirectional",
        "description": "General-purpose I/O for IEEE 1588 event triggering or capture; CLK_OUT_EN strap pin for enabling clock output."
      },
      {
        "number": "22",
        "name": "GPIO2",
        "type": "bidirectional",
        "description": "General-purpose I/O for IEEE 1588 event triggering or capture; PCF_EN strap pin for PHY control frame enable."
      },
      {
        "number": "23",
        "name": "GPIO3",
        "type": "bidirectional",
        "description": "General-purpose I/O for IEEE 1588 event triggering or capture."
      },
      {
        "number": "24",
        "name": "CLK_OUT",
        "type": "bidirectional",
        "description": "Configurable clock output providing internal PTP clock (25 MHz default), 50-MHz RMII reference, 25-MHz receive clock, or reference pass-through; can input external IEEE 1588 reference clock."
      },
      {
        "number": "25",
        "name": "GPIO4",
        "type": "bidirectional",
        "description": "General-purpose I/O for IEEE 1588 event triggering or capture."
      },
      {
        "number": "26",
        "name": "LED_ACT",
        "type": "output",
        "description": "LED output indicating activity in Mode 1, collision in Mode 2, or full-duplex status in Mode 3; can be used as GPIO5."
      },
      {
        "number": "27",
        "name": "LED_SPEED/FX_SD",
        "type": "bidirectional",
        "description": "LED output showing 10/100 Mb/s speed (ON at 100 Mb/s, OFF at 10 Mb/s); can function as GPIO6 or FX_SD fiber-mode signal detect input."
      },
      {
        "number": "28",
        "name": "LED_LINK",
        "type": "output",
        "description": "LED output indicating link status; can be used as GPIO7 for general-purpose I/O or AN_EN auto-negotiation enable strap pin."
      },
      {
        "number": "29",
        "name": "RESET_N",
        "type": "input",
        "description": "Active-low asynchronous reset input with weak internal pullup; minimum 1 µs assertion initializes device and reloads strap options."
      },
      {
        "number": "30",
        "name": "MDIO",
        "type": "bidirectional",
        "description": "Bi-directional serial management data I/O for register access; requires 1.5-kΩ external pullup resistor or internal pullup via CDCTRL1 register bit 3."
      },
      {
        "number": "31",
        "name": "MDC",
        "type": "input",
        "description": "Serial management data clock input, synchronous to MDIO, with maximum clock rate of 25 MHz."
      },
      {
        "number": "32",
        "name": "IO_VDD",
        "type": "power_in",
        "description": "I/O VDD supply, 3.3 V ±5% or 2.5 V ±5% nominal."
      },
      {
        "number": "33",
        "name": "X2",
        "type": "output",
        "description": "Crystal oscillator output pin for external 25-MHz crystal resonator connection; leave unconnected if using external CMOS oscillator on X1 only."
      },
      {
        "number": "34",
        "name": "X1",
        "type": "input",
        "description": "Crystal/oscillator input, 25-MHz ±50-ppm source for MII mode or 50-MHz for RMII Slave mode or 25-MHz for RMII Master mode."
      },
      {
        "number": "35",
        "name": "IO_CORE_VSS",
        "type": "power_in",
        "description": "Digital ground for I/O core circuits."
      },
      {
        "number": "36",
        "name": "GPIO8",
        "type": "bidirectional",
        "description": "General-purpose I/O for IEEE 1588 event triggering or capture."
      },
      {
        "number": "37",
        "name": "GPIO9",
        "type": "bidirectional",
        "description": "General-purpose I/O for IEEE 1588 event triggering or capture."
      },
      {
        "number": "38",
        "name": "RX_CLK",
        "type": "output",
        "description": "MII receive clock output, 25 MHz for 100 Mb/s mode or 2.5 MHz for 10 Mb/s mode, with integrated 50-Ω signal termination."
      },
      {
        "number": "39",
        "name": "RX_DV",
        "type": "output",
        "description": "MII receive data valid output asserted high indicating valid data on RXD[3:0]; provides integrated 50-Ω signal termination."
      },
      {
        "number": "40",
        "name": "CRS/CRS_DV",
        "type": "output",
        "description": "MII carrier sense output asserted high for non-idle receive medium; provides integrated 50-Ω signal termination; can be used as LED_CFG strap pin."
      },
      {
        "number": "41",
        "name": "RX_ER",
        "type": "output",
        "description": "MII receive error output asserted high synchronously to RX_CLK for invalid symbols in received packets; provides integrated 50-Ω signal termination; can be used as FX_EN_Z fiber mode enable strap pin."
      },
      {
        "number": "42",
        "name": "COL",
        "type": "output",
        "description": "MII collision detect output asserted high in half-duplex modes for simultaneous transmit/receive; provides integrated 50-Ω signal termination; can be used as PHYAD0 PHY address strap pin."
      },
      {
        "number": "43",
        "name": "RXD_3",
        "type": "output",
        "description": "MII receive data output driven synchronously to RX_CLK (25 MHz for 100 Mb/s, 2.5 MHz for 10 Mb/s); can be used as PHYAD1 PHY address strap pin."
      },
      {
        "number": "44",
        "name": "RXD_2",
        "type": "output",
        "description": "MII receive data output driven synchronously to RX_CLK (25 MHz for 100 Mb/s, 2.5 MHz for 10 Mb/s); can be used as PHYAD2 PHY address strap pin."
      },
      {
        "number": "45",
        "name": "RXD_1",
        "type": "output",
        "description": "MII receive data output driven synchronously to RX_CLK (25 MHz for 100 Mb/s, 2.5 MHz for 10 Mb/s); can be used as PHYAD3 PHY address strap pin."
      },
      {
        "number": "46",
        "name": "RXD_0",
        "type": "output",
        "description": "MII receive data output driven synchronously to RX_CLK (25 MHz for 100 Mb/s, 2.5 MHz for 10 Mb/s); has weak internal pullup; can be used as PHYAD4 PHY address strap pin."
      },
      {
        "number": "47",
        "name": "IO_VSS",
        "type": "power_in",
        "description": "Digital ground for I/O interface circuits."
      },
      {
        "number": "48",
        "name": "IO_VDD",
        "type": "power_in",
        "description": "I/O VDD supply, 3.3 V ±5% or 2.5 V ±5% nominal."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: LED_SPEED/FX_SD (pin 27) has conflicting type annotations: section 3.6 lists as 'S, O, PU' (strappin; Multiple LED pins have dual functions as LED outputs and configurable GPIO: LED_ACT (pin 26, GPIO5),; TDO (pin 9, GPIO10) and TDI (pin 12, GPIO11) have dual functions as JTAG pins (output/input respecti"
        ],
        "pages_sent": 21,
        "cost_usd": 0.4392,
        "at": "2026-09-24T03:09:22"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dp83640",
        "pages": 136,
        "sha256": "dba00c9035801e90",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "dp83640tvvx.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          1.5
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dp83640tvvx-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          1.5
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "2ac40c66db7952fcf44507e5ef0b99788944bb03193ae67c121ec0106626d159",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "LQFP-48(7x7)",
      "Category": "Interface",
      "Pins": "48"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "dp83640tvvx"
  ],
  "discovery_pitch": "DP83640TVVX (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
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  "files": [
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    "dp83640tvvx.kicad_mod",
    "dp83640tvvx.glb",
    "dp83640tvvx.step",
    "dp83640tvvx.lbr",
    "docs/hero.png",
    "docs/dp83640tvvx-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
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  "visibility": {
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}