Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

main

Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	1d ago
viewers	dac7565icpwr: viewers · Ray	1d ago
dac7565icpwr-etched.glb	dac7565icpwr: factory component page (tier=lcsc) · Ray	1d ago
dac7565icpwr-etched.step	dac7565icpwr: factory component page (tier=lcsc) · Ray	1d ago
dac7565icpwr-hero.glb	dac7565icpwr: hero GLB from the etched model (keeps the MPN mark) · Ray	7h ago
dac7565icpwr-hero.overlay.json	Publish 0.1.0 · Ray	1d ago
dac7565icpwr.glb	Publish 0.1.0 · Ray	1d ago
dac7565icpwr.kicad_mod	Publish 0.1.0 · Ray	1d ago
dac7565icpwr.kicad_sym	Publish 0.1.0 · Ray	1d ago
dac7565icpwr.lbr	Publish 0.1.0 · Ray	1d ago
dac7565icpwr.step	Publish 0.1.0 · Ray	1d ago
package.json	Publish 0.1.0 · Ray	1d ago
page.json	Set visibility: public · Ray	1d ago
README.md	Initial commit: component/dac7565icpwr · Ray	1d ago

DAC7565ICPWR

Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-16

DAC7565ICPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VOUTA	output	Analog output voltage from DAC A.
2	VOUTB	output	Analog output voltage from DAC B.
3	VREFH/VREFOUT	bidirectional	Positive reference input, or reference output at 2.5V when the internal reference is used; the internal reference can source up to 20mA at this pin.
4	AVDD	power_in	Power-supply input, 2.7V to 5.5V.
5	VREFL	input	Negative reference input; VREFL must be below VREFH, with VREFL limited to AVDD/2 maximum per the reference input range.
6	GND	power_in	Ground reference point for all circuitry on the part.
7	VOUTC	output	Analog output voltage from DAC C.
8	VOUTD	output	Analog output voltage from DAC D.
9	SYNC	input	Level-triggered active-low frame sync for the input data; data are sampled on subsequent falling SCLK edges, the DAC output updates after the 24th clock, and a SYNC rising edge before the 24th clock aborts the write (Schmitt-trigger input).
10	SCLK	input	Serial clock input with data transfer rates up to 50MHz (Schmitt-trigger input).
11	DIN	input	Serial data input, clocked into the 24-bit input shift register on each falling SCLK edge (Schmitt-trigger input).
12	IOVDD	power_in	Digital input-output power supply, 1.8V to 5.5V per the electrical characteristics.
13	RST	input	Asynchronous active-low reset that sets all DAC channels to zero-scale (RSTSEL = 0) or mid-scale (RSTSEL = 1).
14	RSTSEL	input	Reset select: when low, input coding is binary; when high, input coding is two's complement.
15	ENABLE	input	Active-low enable that connects the SPI interface to the serial port.
16	LDAC	input	Load DACs input, rising-edge triggered, which loads all DAC registers.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-16
Category	Data Acquisition
Pins	16

CAD (KiCad official)

Symbol: DAC7565ICPWR
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)
3D model files: dac7565icpwr-etched.step / dac7565icpwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac7565icpwr.step / dac7565icpwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (51 pp, sha256 676bd6014edb5cf1, retrieved 2026-10-08, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF