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CSD15571Q2

Public Made by Adom

by adom

Texas Instruments MOSFETs, WSON-6(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs csd15571q2: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers csd15571q2: viewers · Ray
csd15571q2-etched.fit.json csd15571q2: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
csd15571q2-etched.glb csd15571q2: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
csd15571q2-etched.step csd15571q2: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
csd15571q2.glb Publish 0.1.0 · Ray
csd15571q2.kicad_mod Publish 0.1.0 · Ray
csd15571q2.kicad_sym Publish 0.1.0 · Ray
csd15571q2.lbr Publish 0.1.0 · Ray
csd15571q2.step Publish 0.1.0 · Ray
package.json csd15571q2: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
page.json csd15571q2: specified limits as data (metadata.characteristics, 25 rows from the datasheet) · Ray
README.md csd15571q2: specified limits as data (metadata.characteristics, 25 rows from the datasheet) · Ray

CSD15571Q2

Texas Instruments · MOSFETs · WSON-6(2x2)

CSD15571Q2 from Texas Instruments, in a WSON-6(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain terminal of the N-channel power MOSFET; rated for a maximum drain-to-source voltage (BVDSS) of 20 V and continuous drain current up to 10 A (22 A package-limited), internally common with the other four drain pins.
2 D passive Drain terminal of the N-channel power MOSFET; rated for a maximum drain-to-source voltage (BVDSS) of 20 V and continuous drain current up to 10 A (22 A package-limited), internally common with the other four drain pins.
3 D passive Drain terminal of the N-channel power MOSFET; rated for a maximum drain-to-source voltage (BVDSS) of 20 V and continuous drain current up to 10 A (22 A package-limited), internally common with the other four drain pins.
4 D passive Drain terminal of the N-channel power MOSFET; rated for a maximum drain-to-source voltage (BVDSS) of 20 V and continuous drain current up to 10 A (22 A package-limited), internally common with the other four drain pins.
5 D passive Drain terminal of the N-channel power MOSFET; rated for a maximum drain-to-source voltage (BVDSS) of 20 V and continuous drain current up to 10 A (22 A package-limited), internally common with the other four drain pins.
6 G input Gate control terminal; maximum gate-to-source voltage is ±20 V, with gate-to-source threshold voltage VGS(th) specified 1.10 V to 1.90 V (typical 1.45 V) at VDS=VGS, IDS=250 µA.
7 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6(2x2)
Category Transistors/Thyristors
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain to Source Voltage VDS 20 V 1
Gate to Source Voltage VGS -20 20 V 1
Continuous Drain Current (Package Limit) ID 22 A Package limit 1
Continuous Drain Current ID 10 A (1) RθJA = 50 on 1in² Cu (2 oz.) on .060" thick FR4 PCB 1
Pulsed Drain Current, TA = 25°C IDM 52 A (2) Pulse duration 10μs, duty cycle ≤2% 1
Power Dissipation PD 2.5 W (1) RθJA = 50 on 1in² Cu (2 oz.) on .060" thick FR4 PCB 1
Operating Junction and Storage Temperature Range TJ, TSTG -55 150 °C 1
Avalanche Energy, single pulse EAS 18 mJ ID = 19A, L = 0.1mH, RG = 25Ω 1
Drain to Source Voltage BVDSS 20 V VGS = 0V, ID = 250μA 2
Drain to Source Leakage Current IDSS 1 μA VGS = 0V, VDS = 20V 2
Gate to Source Leakage Current IGSS 100 nA VDS = 0V, VGS = 20V 2
Gate to Source Threshold Voltage VGS(th) 1.1 1.45 1.9 V VDS = VGS, IDS = 250μA 2
Drain to Source On Resistance RDS(on) 16 19.2 mΩ VGS = 4.5V, IDS = 5A 2
Drain to Source On Resistance RDS(on) 12 15 mΩ VGS = 10V, IDS = 5A 2
Input Capacitance CISS 320 419 pF 2
Output Capacitance COSS 184 239 pF VGS = 0V, VDS = 10V, f = 1MHz 2
Reverse Transfer Capacitance CRSS 32 42 pF 2
Series Gate Resistance Rg 3.8 7.6 Ω 2
Gate Charge Total (4.5V) Qg 2.5 3.3 nC 2
Gate Charge Total (10V) Qg 5.1 6.7 nC 2
Diode Forward Voltage VSD 0.82 1 V IDS = 5A, VGS = 0V 2
Thermal Resistance Junction to Case RθJC 4.5 °C/W (1) RθJC is determined with the device mounted on a 1-inch² (6.45-cm²), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB 2
Thermal Resistance Junction to Ambient RθJA 65 °C/W (1)(2) Device mounted on FR4 with 1-inch² (6.45-cm²), 2-oz. (0.071-mm thick) Cu 2
Thermal Resistance Junction to Ambient (max, 1 inch² pad) RθJA 65 °C/W Mounted on 1 inch² (6.45 cm²) of 2-oz. (0.071-mm thick) Cu 3
Thermal Resistance Junction to Ambient (max, minimum pad) RθJA 235 °C/W Mounted on minimum pad area of 2-oz. (0.071-mm thick) Cu 3

CAD (KiCad official)

  • Symbol: CSD15571Q2
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6(2x2) (KiCad packages3D, STEP)
  • 3D model files: csd15571q2-etched.step / csd15571q2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); csd15571q2.step / csd15571q2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (10 pp, sha256 a6f518d13e6c9d3b, retrieved 2026-09-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF