CDCE6214TWRGERQ1

{
  "slug": "cdce6214twrgerq1",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, QFN-24(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "clock-timing",
    "cdce6214twrgerq1",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cdce6214twrgerq1.kicad_sym",
    "cdce6214twrgerq1.kicad_mod",
    "cdce6214twrgerq1.glb",
    "cdce6214twrgerq1.step",
    "cdce6214twrgerq1.lbr",
    "docs/hero.png",
    "docs/cdce6214twrgerq1-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "component": {
    "mpn": "CDCE6214TWRGERQ1",
    "manufacturer": "Texas Instruments",
    "package": "QFN-24(4x4)",
    "pin_count": 25,
    "category": "Clock/Timing",
    "subcategory": "Clock Generators, PLLs, Frequency Synthesizers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/cdce6214-q1",
    "parts": {
      "symbol": "cdce6214twrgerq1.kicad_sym",
      "footprint": "cdce6214twrgerq1.kicad_mod",
      "model_3d": "cdce6214twrgerq1-etched.glb",
      "model_3d_plain": "cdce6214twrgerq1.glb",
      "model_3d_step": "cdce6214twrgerq1-etched.step",
      "model_3d_step_plain": "cdce6214twrgerq1.step",
      "lbr": "cdce6214twrgerq1.lbr"
    },
    "distributor_links": {
      "lcsc": "C1855735"
    },
    "pins": [
      {
        "number": "1",
        "name": "SECREF_P",
        "type": "input",
        "description": "Secondary reference input accepts differential or single-ended clock or crystal input (XOUT for crystal) with AC coupling capacitor and configurable internal biasing based on input mode."
      },
      {
        "number": "2",
        "name": "SECREF_N",
        "type": "input",
        "description": "Secondary reference input (differential pair, XIN for crystal) accepts differential or single-ended clock input with AC coupling capacitor and configurable internal biasing based on input mode."
      },
      {
        "number": "3",
        "name": "VDD_REF",
        "type": "power_in",
        "description": "Power supply (1.8V, 2.5V, or 3.3V ±5%) for reference input circuits, digital core, and I2C pull-up resistors."
      },
      {
        "number": "4",
        "name": "REFSEL",
        "type": "input",
        "description": "Reference input selection control pin (three-state) with 50kΩ pull-up and 50kΩ pull-down resistors for selecting primary or secondary reference source."
      },
      {
        "number": "5",
        "name": "PRIREF_P",
        "type": "input",
        "description": "Primary reference input accepts differential or single-ended clock with AC coupling capacitor and configurable internal biasing based on input mode."
      },
      {
        "number": "6",
        "name": "PRIREF_N",
        "type": "input",
        "description": "Primary reference input (differential pair) accepts differential or single-ended clock with AC coupling capacitor and configurable internal biasing based on input mode."
      },
      {
        "number": "7",
        "name": "OUT0",
        "type": "output",
        "description": "LVCMOS output 0 with programmable slew rate and reference input bypass capability to allow reference clock routing to output."
      },
      {
        "number": "8",
        "name": "PDN",
        "type": "input",
        "description": "Power-down/reset input (active low) or synchronization signal input (SYNCN) with 50kΩ pull-up resistor (disabled in output mode)."
      },
      {
        "number": "9",
        "name": "OUT4_N",
        "type": "output",
        "description": "Negative output of differential pair 4 supporting LVDS, LP-HCSL, or LVCMOS output standards with programmable driver configuration."
      },
      {
        "number": "10",
        "name": "OUT4_P",
        "type": "output",
        "description": "Positive output of differential pair 4 supporting LVDS, LP-HCSL, or LVCMOS output standards with programmable driver configuration."
      },
      {
        "number": "11",
        "name": "GPIO4",
        "type": "bidirectional",
        "description": "General purpose input/output pin that can function as PLL lock status output or GPIO input with programmable configuration."
      },
      {
        "number": "12",
        "name": "SCL/GPIO3",
        "type": "input",
        "description": "I2C serial clock input or GPIO3 input, requires external pull-up resistor to VDD_REF in I2C mode with fail-safe input capability."
      },
      {
        "number": "13",
        "name": "OUT3_N",
        "type": "output",
        "description": "Negative output of differential pair 3 supporting LVDS or LP-HCSL output standards with programmable driver configuration."
      },
      {
        "number": "14",
        "name": "OUT3_P",
        "type": "output",
        "description": "Positive output of differential pair 3 supporting LVDS or LP-HCSL output standards with programmable driver configuration."
      },
      {
        "number": "15",
        "name": "VDDO_34",
        "type": "power_in",
        "description": "Power supply (1.8V, 2.5V, or 3.3V ±5%) for OUT0, OUT3, and OUT4 output channels with independent voltage configuration."
      },
      {
        "number": "16",
        "name": "VDDO_12",
        "type": "power_in",
        "description": "Power supply (1.8V, 2.5V, or 3.3V ±5%) for OUT1 and OUT2 output channels with independent voltage configuration."
      },
      {
        "number": "17",
        "name": "OUT2_N",
        "type": "output",
        "description": "Negative output of differential pair 2 supporting LVDS or LP-HCSL output standards with programmable driver configuration."
      },
      {
        "number": "18",
        "name": "OUT2_P",
        "type": "output",
        "description": "Positive output of differential pair 2 supporting LVDS or LP-HCSL output standards with programmable driver configuration."
      },
      {
        "number": "19",
        "name": "SDA/GPIO2",
        "type": "bidirectional",
        "description": "I2C serial data open-drain bidirectional output or GPIO2 input, requires external pull-up resistor to VDD_REF in I2C mode with fail-safe input."
      },
      {
        "number": "20",
        "name": "GPIO1",
        "type": "bidirectional",
        "description": "General purpose input/output pin that can function as PLL lock status output or GPIO input with programmable configuration."
      },
      {
        "number": "21",
        "name": "OUT1_N",
        "type": "output",
        "description": "Negative output of differential pair 1 supporting LVDS, LP-HCSL, or LVCMOS output standards with programmable driver configuration."
      },
      {
        "number": "22",
        "name": "OUT1_P",
        "type": "output",
        "description": "Positive output of differential pair 1 supporting LVDS, LP-HCSL, or LVCMOS output standards with programmable driver configuration."
      },
      {
        "number": "23",
        "name": "HW_SW_CTRL",
        "type": "input",
        "description": "EEPROM page selection control pin (three-state) with 50kΩ pull-up and 50kΩ pull-down resistors for selecting factory or user-programmed configuration page."
      },
      {
        "number": "24",
        "name": "VDD_VCO",
        "type": "power_in",
        "description": "Power supply (1.8V, 2.5V, or 3.3V ±5%) for PLL, VCO, and charge pump circuits."
      },
      {
        "number": "25",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "exposed pad 25 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 60,
        "cost_usd": 0.6717,
        "at": "2026-09-22T00:11:22"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/cdce6214-q1",
        "pages": 60,
        "sha256": "5f5e24f0443f0c03",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 25,
        "described": 25,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cdce6214twrgerq1.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f7d256794c4147daf24dcae0554fae18510315e565ad1e239b475be7fef80d8b",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cdce6214twrgerq1-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "8305a72bbe18ccde928a23b070e1cbc4af2976cfaa67d6fdce6c94cfd21d73bc",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}