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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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page.json asdm30n120q-r: specified limits as data (metadata.characteristics, 18 rows from the datasheet) · Ray 16d ago
README.md asdm30n120q-r: specified limits as data (metadata.characteristics, 18 rows from the datasheet) · Ray 16d ago

ASDM30N120Q-R

ASDsemi · MOSFETs · DFN5x6-8

ASDM30N120Q-R from ASDsemi, in a DFN5x6-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the N-channel MOSFET (pins 1-3 are source); pin 1 is marked by the dot; drain-source breakdown 30 V, diode continuous forward current 120 A at TC=25°C.
2 S passive Source of the N-channel MOSFET (pins 1-3 are source), tied with pins 1 and 3; continuous drain current 120 A at TC=25°C and 80 A at TC=100°C.
3 S passive Source of the N-channel MOSFET (pins 1-3 are source), tied with pins 1 and 2; pulsed drain current 480 A at TC=25°C.
4 G input Gate of the MOSFET; gate-source voltage limit ±20 V, threshold 1.0 to 2 V at ID=250μA.
5 D passive Drain of the MOSFET (pins 5-8 are drain); VDS rating 30 V, RDS(on) typ 2.1 mΩ at VGS=10 V.
6 D passive Drain of the MOSFET (pins 5-8 are drain), tied with pins 5, 7 and 8; VDS rating 30 V.
7 D passive Drain of the MOSFET (pins 5-8 are drain), tied with pins 5, 6 and 8; VDS rating 30 V.
8 D passive Drain of the MOSFET (pins 5-8 are drain), tied with pins 5, 6 and 7; VDS rating 30 V.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer ASDsemi
Package DFN5x6-8
Category Transistors/Thyristors
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source breakdown voltage V(BR)DSS 30 V VGS=0V ID=250μA 2
Zero gate voltage drain current IDSS 1 μA VDS=24V,VGS=0V 2
Zero gate voltage drain current (high temperature) IDSS 30 μA VDS=24V,VGS=0V, Tj=85°C 2
Gate-body leakage current IGSS -100 100 nA VGS=±20V,VDS=0V 2
Gate threshold voltage VGS(TH) 1 1.5 2 V VDS=VGS,ID=250μA 2
Drain-source on-state resistance (VGS=10V) RDS(ON) 2.1 3.5 mΩ VGS=10V, ID=30A 2
Drain-source on-state resistance (VGS=4.5V) RDS(ON) 3.6 4.5 mΩ VGS=4.5V, ID=30A 2
Forward on voltage VSD 0.79 1.2 V ISD=20A,VGS=0V 2
Gate-source voltage VGS -20 20 V 1
Continuous drain current ID 120 A VGS=10V, TC=25°C 1
Continuous drain current ID 80 A VGS=10V, TC=100°C 1
Diode continuous forward current IS 120 A TC=25°C 1
Pulse drain current IDM 480 A TC=25°C, repetitive, pulse width limited by max. junction temperature 1
Avalanche energy, single pulsed EAS 100 mJ L=0.5mH, RG=25Ω, IAS=20A, VGS=10V, starting TJ=25°C 1
Maximum power dissipation PD 45 W TC=25°C 1
Storage and operating temperature range TSTG, TJ -55 150 °C 1
Thermal resistance, junction to case RJC 1.8 °C/W 1
Thermal resistance, junction to ambient RJA 62 °C/W 1

CAD (KiCad official)

  • Symbol: ASDM30N120Q-R
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN5x6-8 (KiCad packages3D, STEP)
  • 3D model files: asdm30n120q-r-etched.step / asdm30n120q-r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); asdm30n120q-r.step / asdm30n120q-r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ASDsemi datasheet (7 pp, sha256 e8a3ff68c653447a, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF