# ASDM20P13S-R

**ASDsemi** · MOSFETs · SOP-8

ASDM20P13S-R from ASDsemi, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, tied internally with pins 2 and 3. |
| 2 | S | passive | Source of the P-channel MOSFET, tied internally with pins 1 and 3. |
| 3 | S | passive | Source of the P-channel MOSFET, tied internally with pins 1 and 2. |
| 4 | G | input | Gate of the P-channel MOSFET; VGS rated ±12 V with threshold of -0.3 to -1.0 V. |
| 5 | D | passive | Drain of the P-channel MOSFET (VDS -20 V max), tied internally with pins 6, 7 and 8. |
| 6 | D | passive | Drain of the P-channel MOSFET (VDS -20 V max), tied internally with pins 5, 7 and 8. |
| 7 | D | passive | Drain of the P-channel MOSFET (VDS -20 V max), tied internally with pins 5, 6 and 8. |
| 8 | D | passive | Drain of the P-channel MOSFET (VDS -20 V max), tied internally with pins 5, 6 and 7. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | ASDsemi |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -20 |  |  | V | VGS =0V, ID =-250uA | 2 |
| Gate Threshold Voltage | VGS(TH) | -0.3 | -0.6 | -1 | V | VGS =VDS, ID =-250uA | 2 |
| Drain-Source Leakage Current | IDSS |  |  | -1 | uA | VDS=-20V, VGS =0V | 2 |
| Gate-Source Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±12V, VDS =0V | 2 |
| Static Drain-source On-Resistance | RDS(ON) |  | 6 | 13 | mΩ | VGS=-10V, ID=-8A | 2 |
| Static Drain-source On-Resistance | RDS(ON) |  | 7.7 | 16 | mΩ | VGS=-4.5V, ID=-6A | 2 |
| Forward Transconductance | gFS |  | 9 |  | s | VDS =-10V, ID=-5A | 2 |
| Source-drain voltage | VSD |  |  | 1.28 | V | Is=-9A | 2 |
| Input capacitance | Ciss |  | 2160 |  | pF | f = 1MHz | 2 |
| Output capacitance | Coss |  | 432 |  | pF |  | 2 |
| Reverse transfer capacitance | Crss |  | 288 |  | pF |  | 2 |
| Total gate charge | Qg |  | 15 |  | nC | VDD =25V, ID = 8A, VGS = 10V | 2 |
| Gate - Source charge | Qgs |  | 4 |  | nC |  | 2 |
| Gate - Drain charge | Qgd |  | 6 |  | nC |  | 2 |
| Drain-Source Voltage | VDS |  |  | -20 | V |  | 1 |
| Gate-Source Voltage | VGS | -12 |  | 12 | V |  | 1 |
| Continuous Drain Current | ID |  |  | -13 | A | TC=25℃ | 1 |
| Continuous Drain Current | ID |  |  | -8.36 | A | TC=75℃ | 1 |
| Continuous Drain Current | ID |  |  | -6.93 | A | TC=100℃ | 1 |
| Pulsed Drain Current | IDM |  |  | -52 | A |  | 1 |
| Total Power Dissipation | PD |  |  | 3.6 | W | TC=25℃ | 1 |
| Total Power Dissipation | PD |  |  | 0.69 | W | TA=25℃ | 1 |
| Operating Junction Temperature | TJ | -55 |  | 150 | ℃ |  | 1 |
| Storage Temperature | TSTG | -55 |  | 150 | ℃ |  | 1 |
| Single Pulse Avalanche Energy | EAS |  |  | 80 | mJ |  | 1 |
| Thermal resistance, junction - case | RthJC |  |  | 24 | °C/W |  | 1 |
| Thermal resistance, junction - ambient | RthJA |  |  | 85 | °C/W |  | 1 |

## CAD (KiCad official)

- Symbol: `ASDM20P13S-R`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `asdm20p13s-r-etched.step` / `asdm20p13s-r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `asdm20p13s-r.step` / `asdm20p13s-r.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [ASDsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590233497228115968) (7 pp, sha256 `d117d93bcb65a2c0`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/asdm20p13s-r-datasheet.pdf)