AP62300TWU-7 — 3 A Synchronous Buck Converter, 4.2 to 18 V (Diodes)
Public Made by Adomby adom
Diodes Incorporated AP62300T — 3 A synchronous buck converter with a 4.2 to 18 V input and 0.8 to 7 V adjustable output. Constant on-time control, 0.763 V feedback reference, integrated 75 mΩ high-side and 45 mΩ low-side MOSFETs, 750 kHz typical switching, PFM at light load for 155 µA quiescent current, EMI-shaped gate driver, UVLO, valley current limit, output UVP and thermal shutdown, 6-pin TSOT-26.
name: ap62300twu-7-usage description: > Use when designing a 3 A step-down rail with the Diodes AP62300/AP62300T/AP62301, or when placing, wiring, sizing components for, laying out or ordering the AP62300TWU-7. Covers the 0.763 V vs 0.800 V variant trap, the feedback divider math and recommended resistor values, inductor and capacitor selection, the BST capacitor, EN and programmable UVLO, the switch-node and input-loop layout rules, thermal limits, and how to pull the symbol, footprint and 3D into KiCad or Fusion 360. Trigger words: AP62300, AP62300T, AP62301, AP62300TWU-7, 3 A buck converter, synchronous buck, step down 12 V to 5 V, 12 V to 3.3 V, point of load, COT buck, low IQ buck, feedback divider, BST capacitor, C1883519, TSOT-26 buck. user-invocable: true
Parent skill: adom/ap62300twu-7, the component page carrying the symbol, footprint, 3D, Fusion library and datasheet.
Using the AP62300TWU-7
A 3 A synchronous buck in a 6-pin TSOT-26. Constant on-time control, so there is no compensation network to design: pick the divider, the inductor and the capacitors, then get the layout right.
Read this first: which variant is on your BOM
| Part | VFB | Mode | IQ |
|---|---|---|---|
| AP62300TWU-7 (this page) | 0.763 V | PFM / PWM | 155 µA |
| AP62300WU-7 | 0.800 V | PFM / PWM | 155 µA |
| AP62301WU-7 | 0.800 V | PWM only | 275 µA |
| AP62300Z6-7 / AP62301Z6-7 | 0.800 V | as above | SOT563 package |
Same pinout, same TSOT-26 land pattern, different reference. Swapping an AP62300WU-7 for
this part without changing the divider shifts the output down about 5%. On a 3.3 V rail
that is 3.15 V, which is inside most tolerances but not all of them, so treat the two as
different parts and check the divider whenever the BOM changes.
Pin mapping
| Pin | Name | Connect to |
|---|---|---|
| 3 | VIN | 4.2 to 18 V input, 10 µF ceramic to GND at the pin |
| 1 | GND | the ground pour, with vias straight down |
| 2 | SW | the inductor, and the low side of the BST capacitor |
| 6 | BST | 100 nF from BST to SW, nothing else |
| 5 | EN | a rail, a GPIO, or a divider from VIN to set input UVLO. Float = automatic start |
| 4 | FB | the divider tap between R1 (from VOUT) and R2 (to GND) |
Sizing the parts
Divider. R1 = R2 × (VOUT / 0.763 − 1), with R2 = 10 kΩ as the default:
| VOUT | 1.2 V | 1.5 V | 1.8 V | 2.5 V | 3.3 V | 5.0 V |
|---|---|---|---|---|---|---|
| R1 | 5.76 kΩ | 9.76 kΩ | 13.7 kΩ | 22.6 kΩ | 33.2 kΩ | 56.2 kΩ |
| L | 1.5 µH | 1.5 µH | 2.2 µH | 2.2 µH | 3.3 µH | 3.3 µH |
Larger R2 costs less quiescent current and buys more noise pickup; 10 kΩ is the sweet spot Diodes characterizes. Above 1.8 V add a 10 to 100 pF feedforward capacitor across R1 for transient response.
Inductor. L = VOUT × (VIN − VOUT) / (VIN × ΔIL × fSW), with ΔIL at 30 to 50% of 3 A. Practical range is 1.2 to 4.7 µH. Size the saturation current for ILOAD + ΔIL/2 plus 35% margin, and keep DCR under 30 mΩ for efficiency.
Capacitors. 10 µF ceramic on the input is enough for most designs, rated for an RMS current above half the load. 22 to 68 µF of effective output capacitance; the datasheet default is 2 × 22 µF. Remember DC bias derating on small ceramics: a 22 µF 0805 X5R at 5 V can be half its marked value.
BST. 100 nF or larger, X7R, from BST to SW. It is not optional and it is not a bypass cap; it is the high-side gate supply.
EN and programmable UVLO
EN has a precision 1.2 V threshold (1.04 V falling), so a resistor divider from VIN to EN sets the input voltage at which the converter starts. That is the right way to sequence a rail off a slow-charging input. Leave EN open for automatic startup, and note the internal current sources (1.5 µA below the threshold, 7 µA above) shift the divider slightly. Soft-start is fixed at 2.5 ms internally.
Layout rules that matter
- Input loop first. The 10 µF input cap goes across VIN and GND with the smallest possible loop. This loop carries the switched current, and it is the main source of radiated EMI. Everything else on the board is second to this.
- SW is a small, quiet copper island. Just wide enough for 3 A to the inductor, never a plane, and never routed under the feedback network.
- Feedback last, and short. Put R1/R2 next to FB, tap VOUT at the load side of the output capacitor, and keep the FB trace away from SW and the inductor.
- Heat leaves through GND. GND (pin 1) is the thermal path in this package: no exposed pad. Vias around the GND pin into 2 oz internal ground layers, and the same treatment around the VIN pin. At 70 °C/W, 1 W of loss is a 70 °C rise, so a 3 A 12 V to 3.3 V rail needs real copper.
- Output capacitors close to GND, feedback components close to FB, and the inductor close to SW: Diodes' own recommended layout (Figure 43 in the datasheet) is worth copying pad for pad.
Getting the CAD in
adom-wiki pkg install adom/ap62300twu-7 # symbol + footprint + STEP + GLB + .lbr
- KiCad: add
AP62300TWU-7.kicad_symto sym-lib-table and the directory holdingSOT95P280X100-6N.kicad_modto fp-lib-table, both as the nicknameAP62300TWU-7. The symbol's Footprint field already readsAP62300TWU-7:SOT95P280X100-6N, and the footprint points atap62300twu-7.stepfor the 3D viewer. - Fusion 360 Electronics: open
AP62300TWU-7.lbrdirectly. It carries the symbol, the package, and a complete deviceset. - Altium:
adom-lbr export-altium ap62300twu-7.adom-lbr.jsonfor .SchLib + .PcbLib, orexport-intlibfor one .IntLib.
Ordering
DigiKey 31-AP62300TWU-7TR-ND, Mouser 621-AP62300TWU-7, LCSC C1883519. The -7 suffix
is the 3000-piece reel and the package marking is TP. Beware the near-identical
AP62300TWU-7-N in distributor search results: different orderable, and it is frequently
out of stock.
---
name: ap62300twu-7-usage
description: >
Use when designing a 3 A step-down rail with the Diodes AP62300/AP62300T/AP62301, or when
placing, wiring, sizing components for, laying out or ordering the AP62300TWU-7. Covers
the 0.763 V vs 0.800 V variant trap, the feedback divider math and recommended resistor
values, inductor and capacitor selection, the BST capacitor, EN and programmable UVLO,
the switch-node and input-loop layout rules, thermal limits, and how to pull the symbol,
footprint and 3D into KiCad or Fusion 360. Trigger words: AP62300, AP62300T, AP62301,
AP62300TWU-7, 3 A buck converter, synchronous buck, step down 12 V to 5 V, 12 V to 3.3 V,
point of load, COT buck, low IQ buck, feedback divider, BST capacitor, C1883519, TSOT-26 buck.
user-invocable: true
---
**Parent skill:** [adom/ap62300twu-7](https://wiki.adom.inc/adom/ap62300twu-7), the component
page carrying the symbol, footprint, 3D, Fusion library and datasheet.
# Using the AP62300TWU-7
A 3 A synchronous buck in a 6-pin TSOT-26. Constant on-time control, so there is no
compensation network to design: pick the divider, the inductor and the capacitors, then get
the layout right.
## Read this first: which variant is on your BOM
| Part | V<sub>FB</sub> | Mode | I<sub>Q</sub> |
|---|---|---|---|
| **AP62300TWU-7** (this page) | **0.763 V** | PFM / PWM | 155 µA |
| AP62300WU-7 | 0.800 V | PFM / PWM | 155 µA |
| AP62301WU-7 | 0.800 V | PWM only | 275 µA |
| AP62300Z6-7 / AP62301Z6-7 | 0.800 V | as above | SOT563 package |
Same pinout, same TSOT-26 land pattern, different reference. Swapping an `AP62300WU-7` for
this part without changing the divider shifts the output down about 5%. On a 3.3 V rail
that is 3.15 V, which is inside most tolerances but not all of them, so treat the two as
different parts and check the divider whenever the BOM changes.
## Pin mapping
| Pin | Name | Connect to |
|---|---|---|
| 3 | VIN | 4.2 to 18 V input, 10 µF ceramic to GND at the pin |
| 1 | GND | the ground pour, with vias straight down |
| 2 | SW | the inductor, and the low side of the BST capacitor |
| 6 | BST | 100 nF from BST to SW, nothing else |
| 5 | EN | a rail, a GPIO, or a divider from VIN to set input UVLO. Float = automatic start |
| 4 | FB | the divider tap between R1 (from VOUT) and R2 (to GND) |
## Sizing the parts
**Divider.** R1 = R2 × (V<sub>OUT</sub> / 0.763 − 1), with R2 = 10 kΩ as the default:
| V<sub>OUT</sub> | 1.2 V | 1.5 V | 1.8 V | 2.5 V | 3.3 V | 5.0 V |
|---|---|---|---|---|---|---|
| R1 | 5.76 kΩ | 9.76 kΩ | 13.7 kΩ | 22.6 kΩ | 33.2 kΩ | 56.2 kΩ |
| L | 1.5 µH | 1.5 µH | 2.2 µH | 2.2 µH | 3.3 µH | 3.3 µH |
Larger R2 costs less quiescent current and buys more noise pickup; 10 kΩ is the sweet spot
Diodes characterizes. Above 1.8 V add a 10 to 100 pF feedforward capacitor across R1 for
transient response.
**Inductor.** L = V<sub>OUT</sub> × (V<sub>IN</sub> − V<sub>OUT</sub>) / (V<sub>IN</sub> ×
ΔI<sub>L</sub> × f<sub>SW</sub>), with ΔI<sub>L</sub> at 30 to 50% of 3 A. Practical range
is 1.2 to 4.7 µH. Size the saturation current for I<sub>LOAD</sub> + ΔI<sub>L</sub>/2 plus
35% margin, and keep DCR under 30 mΩ for efficiency.
**Capacitors.** 10 µF ceramic on the input is enough for most designs, rated for an RMS
current above half the load. 22 to 68 µF of effective output capacitance; the datasheet
default is 2 × 22 µF. Remember DC bias derating on small ceramics: a 22 µF 0805 X5R at 5 V
can be half its marked value.
**BST.** 100 nF or larger, X7R, from BST to SW. It is not optional and it is not a bypass
cap; it is the high-side gate supply.
## EN and programmable UVLO
EN has a precision 1.2 V threshold (1.04 V falling), so a resistor divider from VIN to EN
sets the input voltage at which the converter starts. That is the right way to sequence a
rail off a slow-charging input. Leave EN open for automatic startup, and note the internal
current sources (1.5 µA below the threshold, 7 µA above) shift the divider slightly.
Soft-start is fixed at 2.5 ms internally.
## Layout rules that matter
1. **Input loop first.** The 10 µF input cap goes across VIN and GND with the smallest
possible loop. This loop carries the switched current, and it is the main source of
radiated EMI. Everything else on the board is second to this.
2. **SW is a small, quiet copper island.** Just wide enough for 3 A to the inductor, never
a plane, and never routed under the feedback network.
3. **Feedback last, and short.** Put R1/R2 next to FB, tap V<sub>OUT</sub> at the load side
of the output capacitor, and keep the FB trace away from SW and the inductor.
4. **Heat leaves through GND.** GND (pin 1) is the thermal path in this package: no exposed
pad. Vias around the GND pin into 2 oz internal ground layers, and the same treatment
around the VIN pin. At 70 °C/W, 1 W of loss is a 70 °C rise, so a 3 A 12 V to 3.3 V rail
needs real copper.
5. **Output capacitors close to GND**, feedback components close to FB, and the inductor
close to SW: Diodes' own recommended layout (Figure 43 in the datasheet) is worth copying
pad for pad.
## Getting the CAD in
```bash
adom-wiki pkg install adom/ap62300twu-7 # symbol + footprint + STEP + GLB + .lbr
```
- **KiCad**: add `AP62300TWU-7.kicad_sym` to sym-lib-table and the directory holding
`SOT95P280X100-6N.kicad_mod` to fp-lib-table, both as the nickname `AP62300TWU-7`. The
symbol's Footprint field already reads `AP62300TWU-7:SOT95P280X100-6N`, and the footprint
points at `ap62300twu-7.step` for the 3D viewer.
- **Fusion 360 Electronics**: open `AP62300TWU-7.lbr` directly. It carries the symbol, the
package, and a complete deviceset.
- **Altium**: `adom-lbr export-altium ap62300twu-7.adom-lbr.json` for .SchLib + .PcbLib, or
`export-intlib` for one .IntLib.
## Ordering
DigiKey `31-AP62300TWU-7TR-ND`, Mouser `621-AP62300TWU-7`, LCSC `C1883519`. The `-7` suffix
is the 3000-piece reel and the package marking is `TP`. Beware the near-identical
`AP62300TWU-7-N` in distributor search results: different orderable, and it is frequently
out of stock.