# AO4443

**UMW** · MOSFETs · SOP-8

AO4443 from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | SOURCE terminal of the P-channel MOSFET; pins 1, 2 and 3 are all source and are bonded together. |
| 2 | S | passive | SOURCE terminal of the P-channel MOSFET; pins 1, 2 and 3 are all source and are bonded together. |
| 3 | S | passive | SOURCE terminal of the P-channel MOSFET; pins 1, 2 and 3 are all source and are bonded together. |
| 4 | G | input | GATE terminal; gate-source voltage is rated to ±20 V per the absolute maximum ratings. |
| 5 | D | passive | DRAIN terminal; device drain-source voltage is rated -40 V with continuous drain current of -8 A at TC=25°C. |
| 6 | D | passive | DRAIN terminal; device drain-source voltage is rated -40 V with continuous drain current of -8 A at TC=25°C. |
| 7 | D | passive | DRAIN terminal; device drain-source voltage is rated -40 V with continuous drain current of -8 A at TC=25°C. |
| 8 | D | passive | DRAIN terminal; device drain-source voltage is rated -40 V with continuous drain current of -8 A at TC=25°C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -40 |  |  | V | ID=-250µA, VGS=0V | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | uA | VDS=-32V, VGS=0V | 2 |
| Gate-Body Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Gate Threshold Voltage | VGS(th) | -1 | -2 | -3 | V | VDS=VGS, ID=-250μA | 2 |
| Drain-Source On-State Resistance (VGS=-10V) | RDS(ON) |  |  | 22 | mΩ | VGS=-10V, ID=-6A | 2 |
| Drain-Source On-State Resistance (VGS=-4.5V) | RDS(ON) |  |  | 25 | mΩ | VGS=-4.5V, ID=-5A | 2 |
| Source-Drain Current (Body Diode) | ISD |  |  | -20 | A |  | 2 |
| Forward on Voltage | VSD |  |  | -1.2 | V | IS=-20A, VGS=0V | 2 |
| Drain-Source Voltage | VDS |  |  | -40 | V | VGS=0V | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V | VDS=0V | 1 |
| Drain Current-Continuous | ID |  |  | -8 | A | TC=25°C | 1 |
| Drain Current-Continuous | ID |  |  | -5 | A | TC=100°C | 1 |
| Drain Current-Pulsed | IDM(pluse) |  |  | -20 | A | Note 1: pulse width limited by maximum junction temperature | 1 |
| Maximum Power Dissipation | PD |  |  | 3.8 | W | TC=25°C | 1 |
| Maximum Power Dissipation | PD |  |  | 1.9 | W | TC=100°C | 1 |
| Operating Junction and Storage Temperature Range | TJ, TSTG | -55 |  | 150 | °C |  | 1 |
| Thermal Resistance, Junction-to-Case | RthJC |  | 4 |  | °C/W | Junction-to-Case | 1 |

## CAD (KiCad official)

- Symbol: `AO4443`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `ao4443-etched.step` / `ao4443-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ao4443.step` / `ao4443.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755874546266591232) (7 pp, sha256 `45fe9a7121093a29`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ao4443-datasheet.pdf)