component
ADAU1701JSTZ
Public Made by Adomby adom
Analog Devices Audio Interface ICs, LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
adau1701jstz: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
3cbc091
1mo ago
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448
{
"schema_version": 1,
"type": "component",
"slug": "adau1701jstz",
"title": "ADAU1701JSTZ",
"brief": "Analog Devices Audio Interface ICs, LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface",
"adau1701jstz",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "ADAU1701JSTZ",
"manufacturer": "Analog Devices",
"package": "LQFP-48(7x7)",
"pin_count": 48,
"category": "Interface",
"subcategory": "Audio Interface ICs",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590230602801704960",
"parts": {
"symbol": "adau1701jstz.kicad_sym",
"footprint": "adau1701jstz.kicad_mod",
"model_3d": "adau1701jstz-etched.glb",
"model_3d_plain": "adau1701jstz.glb",
"model_3d_step": "adau1701jstz-etched.step",
"model_3d_step_plain": "adau1701jstz.step",
"lbr": "adau1701jstz.lbr"
},
"distributor_links": {
"lcsc": "C3001875"
},
"pins": [
{
"number": "1",
"name": "AGND",
"type": "power_in",
"description": "Analog Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to AVDD."
},
{
"number": "2",
"name": "ADC0",
"type": "input",
"description": "Analog Audio Input 0 with full-scale input current of 100 μA rms (2 V rms with 18 kΩ external resistor)."
},
{
"number": "3",
"name": "ADC_RES",
"type": "input",
"description": "ADC Reference Current input; set full-scale current with external 18 kΩ resistor connected between this pin and ground."
},
{
"number": "4",
"name": "ADC1",
"type": "input",
"description": "Analog Audio Input 1 with full-scale input current of 100 μA rms (2 V rms with 18 kΩ external resistor)."
},
{
"number": "5",
"name": "RESET",
"type": "input",
"description": "Active Low Reset Input; reset triggered on high-to-low edge, device exits reset on low-to-high edge with 20 ns minimum low pulse width."
},
{
"number": "6",
"name": "SELFBOOT",
"type": "input",
"description": "Enable/Disable Self-Boot; high initiates self-boot operation when brought out of reset, low selects control port mode."
},
{
"number": "7",
"name": "ADDR0",
"type": "input",
"description": "I2C and SPI Address 0; used in combination with ADDR1 to set I2C address or to distinguish between two ICs on common SPI CLATCH line."
},
{
"number": "8",
"name": "MP4",
"type": "bidirectional",
"description": "Multipurpose GPIO or Serial Input Port LRCLK (INPUT_LRCLK) with configurable debounce."
},
{
"number": "9",
"name": "MP5",
"type": "bidirectional",
"description": "Multipurpose GPIO or Serial Input Port BCLK (INPUT_BCLK) with minimum 40 ns pulse widths."
},
{
"number": "10",
"name": "MP1",
"type": "bidirectional",
"description": "Multipurpose GPIO or Serial Input Port Data 1 (SDATA_IN0) with configurable function."
},
{
"number": "11",
"name": "MP0",
"type": "bidirectional",
"description": "Multipurpose GPIO or Serial Input Port Data 0 (SDATA_IN1) with configurable function."
},
{
"number": "12",
"name": "DGND",
"type": "power_in",
"description": "Digital Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to DVDD."
},
{
"number": "13",
"name": "DVDD",
"type": "power_in",
"description": "1.8 V Digital Supply; can be generated from 3.3 V with on-board regulator or supplied externally with 100 nF decouple capacitor."
},
{
"number": "14",
"name": "MP7",
"type": "bidirectional",
"description": "Multipurpose GPIO or Serial Output Port Data 1 (SDATA_OUT1) with 2 mA drive capability."
},
{
"number": "15",
"name": "MP6",
"type": "bidirectional",
"description": "Multipurpose GPIO, Serial Output Port Data 0, or TDM Data Output (SDATA_OUT0) with 2 mA drive capability."
},
{
"number": "16",
"name": "MP10",
"type": "bidirectional",
"description": "Multipurpose GPIO or Serial Output Port LRCLK (OUTPUT_LRCLK) configurable as master or slave."
},
{
"number": "17",
"name": "VDRIVE",
"type": "output",
"description": "1.8 V Regulator Drive output; provides base drive signal for external PNP regulator transistor."
},
{
"number": "18",
"name": "IOVDD",
"type": "power_in",
"description": "Supply for Input and Output Pins (3.3 V); sets highest input voltage for digital inputs and supply for control port and MP pin outputs."
},
{
"number": "19",
"name": "MP11",
"type": "bidirectional",
"description": "Multipurpose GPIO or Serial Output Port BCLK (OUTPUT_BCLK) configurable as master or slave with 2 mA drive."
},
{
"number": "20",
"name": "ADDR1/CDATA/WB",
"type": "input",
"description": "Multifunction I2C Address 1 / SPI Data Input / EEPROM Write Back Trigger pin; sets I2C address, carries SPI data, or triggers writeback on rising edge."
},
{
"number": "21",
"name": "CLATCH/WP",
"type": "bidirectional",
"description": "Multifunction SPI Latch Signal / Self-Boot EEPROM Write Protect pin; acts as SPI latch input or open-collector EEPROM write protect output."
},
{
"number": "22",
"name": "SDA/COUT",
"type": "bidirectional",
"description": "Multifunction I2C Data / SPI Data Output pin; open-collector I2C with 2.2 kΩ pull-up or tri-stated SPI output."
},
{
"number": "23",
"name": "SCL/CCLK",
"type": "bidirectional",
"description": "Multifunction I2C Clock / SPI Clock pin; open-collector I2C input in control mode, open-collector master output in self-boot mode, or SPI clock input."
},
{
"number": "24",
"name": "DVDD",
"type": "power_in",
"description": "1.8 V Digital Supply; can be generated from 3.3 V with on-board regulator or supplied externally with 100 nF decouple capacitor."
},
{
"number": "25",
"name": "DGND",
"type": "power_in",
"description": "Digital Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to DVDD."
},
{
"number": "26",
"name": "MP9",
"type": "bidirectional",
"description": "Multipurpose GPIO, Serial Output Port Data 3 (SDATA_OUT3), or Auxiliary ADC Input 0 with 2 mA drive."
},
{
"number": "27",
"name": "MP8",
"type": "bidirectional",
"description": "Multipurpose GPIO, Serial Output Port Data 2 (SDATA_OUT2), or Auxiliary ADC Input 3 with 2 mA drive."
},
{
"number": "28",
"name": "MP3",
"type": "bidirectional",
"description": "Multipurpose GPIO, Serial Input Port Data 3 (SDATA_IN3), or Auxiliary ADC Input 2 with configurable function."
},
{
"number": "29",
"name": "MP2",
"type": "bidirectional",
"description": "Multipurpose GPIO, Serial Input Port Data 2 (SDATA_IN2), or Auxiliary ADC Input 1 with configurable function."
},
{
"number": "30",
"name": "RSVD",
"type": "unconnected",
"description": "Reserved pin; must be tied to ground either directly or through a pull-down resistor for proper operation."
},
{
"number": "31",
"name": "OSCO",
"type": "output",
"description": "Crystal Oscillator Circuit Output with 100 Ω damping resistor connection; do not use directly to drive clock to other ICs."
},
{
"number": "32",
"name": "MCLKI",
"type": "input",
"description": "Master Clock Input; connect to 3.3 V clock signal or crystal oscillator output (3 μA input leakage)."
},
{
"number": "33",
"name": "PGND",
"type": "power_in",
"description": "PLL Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to PVDD."
},
{
"number": "34",
"name": "PVDD",
"type": "power_in",
"description": "3.3 V Power Supply for PLL and Auxiliary ADC Analog Section with 100 nF decouple capacitor to PGND."
},
{
"number": "35",
"name": "PLL_LF",
"type": "output",
"description": "PLL Loop Filter analog output; connect two capacitors (3.3 nF and 56 nF) and one 475 Ω resistor to this pin."
},
{
"number": "36",
"name": "AVDD",
"type": "power_in",
"description": "3.3V Analog Supply with 100 nF decouple capacitor to AGND."
},
{
"number": "37",
"name": "AGND",
"type": "power_in",
"description": "Analog Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to AVDD."
},
{
"number": "38",
"name": "PLL_MODE0",
"type": "input",
"description": "PLL Mode Setting bit 0; sets master clock PLL output frequency (64×fS, 256×fS, 384×fS, or 512×fS)."
},
{
"number": "39",
"name": "PLL_MODE1",
"type": "input",
"description": "PLL Mode Setting bit 1; sets master clock PLL output frequency (64×fS, 256×fS, 384×fS, or 512×fS)."
},
{
"number": "40",
"name": "CM",
"type": "output",
"description": "1.5 V Common-Mode Reference analog output; connect 47 μF decoupling capacitor to ground to reduce ADC-DAC crosstalk."
},
{
"number": "41",
"name": "FILTD",
"type": "output",
"description": "DAC Filter Decoupling analog output (1.5 V); connect 10 μF capacitor between this pin and ground."
},
{
"number": "42",
"name": "AGND",
"type": "power_in",
"description": "Analog Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to AVDD."
},
{
"number": "43",
"name": "VOUT3",
"type": "output",
"description": "DAC3 analog output with full-scale output voltage of 0.9 V rms; use with active or passive reconstruction filter."
},
{
"number": "44",
"name": "VOUT2",
"type": "output",
"description": "DAC2 analog output with full-scale output voltage of 0.9 V rms; use with active or passive reconstruction filter."
},
{
"number": "45",
"name": "VOUT1",
"type": "output",
"description": "DAC1 analog output with full-scale output voltage of 0.9 V rms; use with active or passive reconstruction filter."
},
{
"number": "46",
"name": "VOUT0",
"type": "output",
"description": "DAC0 analog output with full-scale output voltage of 0.9 V rms; use with active or passive reconstruction filter."
},
{
"number": "47",
"name": "FILTA",
"type": "output",
"description": "ADC Filter Decoupling analog output (1.5 V); connect 10 μF capacitor between this pin and ground."
},
{
"number": "48",
"name": "AVDD",
"type": "power_in",
"description": "3.3V Analog Supply with 100 nF decouple capacitor to AGND."
}
],
"provenance": {
"extractor": "extract_pins 0.2",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.2",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-4-6",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Multipurpose pins (MP0-MP11, pins 8-11, 14-16, 19, 26-29) are highly configurable and can function a; Control port pins (20-23, 7) operate in multiple modes depending on whether device is in I2C, SPI, o; Pin 30 (RSVD) is reserved and must be tied to ground; marked as unconnected type but requires extern"
],
"pages_sent": 52,
"cost_usd": 0.7331,
"at": "2026-09-22T13:06:07"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590230602801704960",
"pages": 52,
"sha256": "417167d2fd3dd077",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 48,
"described": 48,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "adau1701jstz.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.5
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "adau1701jstz-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.5
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "089582c9b299ff9a634084ea579253792bdbc4c2643e620d5730281906e228da",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Analog Devices",
"Package": "LQFP-48(7x7)",
"Category": "Interface",
"Pins": "48"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"adau1701jstz"
],
"discovery_pitch": "ADAU1701JSTZ (Analog Devices) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"adau1701jstz.kicad_sym",
"adau1701jstz.kicad_mod",
"adau1701jstz.glb",
"adau1701jstz.step",
"adau1701jstz.lbr",
"docs/hero.png",
"docs/adau1701jstz-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-24T15:49:12.394Z"
}