ADAU1701JSTZ

{
  "slug": "adau1701jstz",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Audio Interface ICs, LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface",
    "adau1701jstz",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "README.md",
    "adau1701jstz.kicad_sym",
    "adau1701jstz.kicad_mod",
    "adau1701jstz.glb",
    "adau1701jstz.step",
    "adau1701jstz.lbr",
    "docs/hero.png",
    "docs/adau1701jstz-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "component": {
    "mpn": "ADAU1701JSTZ",
    "manufacturer": "Analog Devices",
    "package": "LQFP-48(7x7)",
    "pin_count": 48,
    "category": "Interface",
    "subcategory": "Audio Interface ICs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590230602801704960",
    "parts": {
      "symbol": "adau1701jstz.kicad_sym",
      "footprint": "adau1701jstz.kicad_mod",
      "model_3d": "adau1701jstz-etched.glb",
      "model_3d_plain": "adau1701jstz.glb",
      "model_3d_step": "adau1701jstz-etched.step",
      "model_3d_step_plain": "adau1701jstz.step",
      "lbr": "adau1701jstz.lbr"
    },
    "distributor_links": {
      "lcsc": "C3001875"
    },
    "pins": [
      {
        "number": "1",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to AVDD."
      },
      {
        "number": "2",
        "name": "ADC0",
        "type": "input",
        "description": "Analog Audio Input 0 with full-scale input current of 100 μA rms (2 V rms with 18 kΩ external resistor)."
      },
      {
        "number": "3",
        "name": "ADC_RES",
        "type": "input",
        "description": "ADC Reference Current input; set full-scale current with external 18 kΩ resistor connected between this pin and ground."
      },
      {
        "number": "4",
        "name": "ADC1",
        "type": "input",
        "description": "Analog Audio Input 1 with full-scale input current of 100 μA rms (2 V rms with 18 kΩ external resistor)."
      },
      {
        "number": "5",
        "name": "RESET",
        "type": "input",
        "description": "Active Low Reset Input; reset triggered on high-to-low edge, device exits reset on low-to-high edge with 20 ns minimum low pulse width."
      },
      {
        "number": "6",
        "name": "SELFBOOT",
        "type": "input",
        "description": "Enable/Disable Self-Boot; high initiates self-boot operation when brought out of reset, low selects control port mode."
      },
      {
        "number": "7",
        "name": "ADDR0",
        "type": "input",
        "description": "I2C and SPI Address 0; used in combination with ADDR1 to set I2C address or to distinguish between two ICs on common SPI CLATCH line."
      },
      {
        "number": "8",
        "name": "MP4",
        "type": "bidirectional",
        "description": "Multipurpose GPIO or Serial Input Port LRCLK (INPUT_LRCLK) with configurable debounce."
      },
      {
        "number": "9",
        "name": "MP5",
        "type": "bidirectional",
        "description": "Multipurpose GPIO or Serial Input Port BCLK (INPUT_BCLK) with minimum 40 ns pulse widths."
      },
      {
        "number": "10",
        "name": "MP1",
        "type": "bidirectional",
        "description": "Multipurpose GPIO or Serial Input Port Data 1 (SDATA_IN0) with configurable function."
      },
      {
        "number": "11",
        "name": "MP0",
        "type": "bidirectional",
        "description": "Multipurpose GPIO or Serial Input Port Data 0 (SDATA_IN1) with configurable function."
      },
      {
        "number": "12",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to DVDD."
      },
      {
        "number": "13",
        "name": "DVDD",
        "type": "power_in",
        "description": "1.8 V Digital Supply; can be generated from 3.3 V with on-board regulator or supplied externally with 100 nF decouple capacitor."
      },
      {
        "number": "14",
        "name": "MP7",
        "type": "bidirectional",
        "description": "Multipurpose GPIO or Serial Output Port Data 1 (SDATA_OUT1) with 2 mA drive capability."
      },
      {
        "number": "15",
        "name": "MP6",
        "type": "bidirectional",
        "description": "Multipurpose GPIO, Serial Output Port Data 0, or TDM Data Output (SDATA_OUT0) with 2 mA drive capability."
      },
      {
        "number": "16",
        "name": "MP10",
        "type": "bidirectional",
        "description": "Multipurpose GPIO or Serial Output Port LRCLK (OUTPUT_LRCLK) configurable as master or slave."
      },
      {
        "number": "17",
        "name": "VDRIVE",
        "type": "output",
        "description": "1.8 V Regulator Drive output; provides base drive signal for external PNP regulator transistor."
      },
      {
        "number": "18",
        "name": "IOVDD",
        "type": "power_in",
        "description": "Supply for Input and Output Pins (3.3 V); sets highest input voltage for digital inputs and supply for control port and MP pin outputs."
      },
      {
        "number": "19",
        "name": "MP11",
        "type": "bidirectional",
        "description": "Multipurpose GPIO or Serial Output Port BCLK (OUTPUT_BCLK) configurable as master or slave with 2 mA drive."
      },
      {
        "number": "20",
        "name": "ADDR1/CDATA/WB",
        "type": "input",
        "description": "Multifunction I2C Address 1 / SPI Data Input / EEPROM Write Back Trigger pin; sets I2C address, carries SPI data, or triggers writeback on rising edge."
      },
      {
        "number": "21",
        "name": "CLATCH/WP",
        "type": "bidirectional",
        "description": "Multifunction SPI Latch Signal / Self-Boot EEPROM Write Protect pin; acts as SPI latch input or open-collector EEPROM write protect output."
      },
      {
        "number": "22",
        "name": "SDA/COUT",
        "type": "bidirectional",
        "description": "Multifunction I2C Data / SPI Data Output pin; open-collector I2C with 2.2 kΩ pull-up or tri-stated SPI output."
      },
      {
        "number": "23",
        "name": "SCL/CCLK",
        "type": "bidirectional",
        "description": "Multifunction I2C Clock / SPI Clock pin; open-collector I2C input in control mode, open-collector master output in self-boot mode, or SPI clock input."
      },
      {
        "number": "24",
        "name": "DVDD",
        "type": "power_in",
        "description": "1.8 V Digital Supply; can be generated from 3.3 V with on-board regulator or supplied externally with 100 nF decouple capacitor."
      },
      {
        "number": "25",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to DVDD."
      },
      {
        "number": "26",
        "name": "MP9",
        "type": "bidirectional",
        "description": "Multipurpose GPIO, Serial Output Port Data 3 (SDATA_OUT3), or Auxiliary ADC Input 0 with 2 mA drive."
      },
      {
        "number": "27",
        "name": "MP8",
        "type": "bidirectional",
        "description": "Multipurpose GPIO, Serial Output Port Data 2 (SDATA_OUT2), or Auxiliary ADC Input 3 with 2 mA drive."
      },
      {
        "number": "28",
        "name": "MP3",
        "type": "bidirectional",
        "description": "Multipurpose GPIO, Serial Input Port Data 3 (SDATA_IN3), or Auxiliary ADC Input 2 with configurable function."
      },
      {
        "number": "29",
        "name": "MP2",
        "type": "bidirectional",
        "description": "Multipurpose GPIO, Serial Input Port Data 2 (SDATA_IN2), or Auxiliary ADC Input 1 with configurable function."
      },
      {
        "number": "30",
        "name": "RSVD",
        "type": "unconnected",
        "description": "Reserved pin; must be tied to ground either directly or through a pull-down resistor for proper operation."
      },
      {
        "number": "31",
        "name": "OSCO",
        "type": "output",
        "description": "Crystal Oscillator Circuit Output with 100 Ω damping resistor connection; do not use directly to drive clock to other ICs."
      },
      {
        "number": "32",
        "name": "MCLKI",
        "type": "input",
        "description": "Master Clock Input; connect to 3.3 V clock signal or crystal oscillator output (3 μA input leakage)."
      },
      {
        "number": "33",
        "name": "PGND",
        "type": "power_in",
        "description": "PLL Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to PVDD."
      },
      {
        "number": "34",
        "name": "PVDD",
        "type": "power_in",
        "description": "3.3 V Power Supply for PLL and Auxiliary ADC Analog Section with 100 nF decouple capacitor to PGND."
      },
      {
        "number": "35",
        "name": "PLL_LF",
        "type": "output",
        "description": "PLL Loop Filter analog output; connect two capacitors (3.3 nF and 56 nF) and one 475 Ω resistor to this pin."
      },
      {
        "number": "36",
        "name": "AVDD",
        "type": "power_in",
        "description": "3.3V Analog Supply with 100 nF decouple capacitor to AGND."
      },
      {
        "number": "37",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to AVDD."
      },
      {
        "number": "38",
        "name": "PLL_MODE0",
        "type": "input",
        "description": "PLL Mode Setting bit 0; sets master clock PLL output frequency (64×fS, 256×fS, 384×fS, or 512×fS)."
      },
      {
        "number": "39",
        "name": "PLL_MODE1",
        "type": "input",
        "description": "PLL Mode Setting bit 1; sets master clock PLL output frequency (64×fS, 256×fS, 384×fS, or 512×fS)."
      },
      {
        "number": "40",
        "name": "CM",
        "type": "output",
        "description": "1.5 V Common-Mode Reference analog output; connect 47 μF decoupling capacitor to ground to reduce ADC-DAC crosstalk."
      },
      {
        "number": "41",
        "name": "FILTD",
        "type": "output",
        "description": "DAC Filter Decoupling analog output (1.5 V); connect 10 μF capacitor between this pin and ground."
      },
      {
        "number": "42",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog Ground; tie AGND, DGND, and PGND together in a common ground plane with 100 nF decouple capacitor to AVDD."
      },
      {
        "number": "43",
        "name": "VOUT3",
        "type": "output",
        "description": "DAC3 analog output with full-scale output voltage of 0.9 V rms; use with active or passive reconstruction filter."
      },
      {
        "number": "44",
        "name": "VOUT2",
        "type": "output",
        "description": "DAC2 analog output with full-scale output voltage of 0.9 V rms; use with active or passive reconstruction filter."
      },
      {
        "number": "45",
        "name": "VOUT1",
        "type": "output",
        "description": "DAC1 analog output with full-scale output voltage of 0.9 V rms; use with active or passive reconstruction filter."
      },
      {
        "number": "46",
        "name": "VOUT0",
        "type": "output",
        "description": "DAC0 analog output with full-scale output voltage of 0.9 V rms; use with active or passive reconstruction filter."
      },
      {
        "number": "47",
        "name": "FILTA",
        "type": "output",
        "description": "ADC Filter Decoupling analog output (1.5 V); connect 10 μF capacitor between this pin and ground."
      },
      {
        "number": "48",
        "name": "AVDD",
        "type": "power_in",
        "description": "3.3V Analog Supply with 100 nF decouple capacitor to AGND."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Multipurpose pins (MP0-MP11, pins 8-11, 14-16, 19, 26-29) are highly configurable and can function a; Control port pins (20-23, 7) operate in multiple modes depending on whether device is in I2C, SPI, o; Pin 30 (RSVD) is reserved and must be tied to ground; marked as unconnected type but requires extern"
        ],
        "pages_sent": 52,
        "cost_usd": 0.7331,
        "at": "2026-09-22T13:06:07"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590230602801704960",
        "pages": 52,
        "sha256": "417167d2fd3dd077",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "adau1701jstz-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "089582c9b299ff9a634084ea579253792bdbc4c2643e620d5730281906e228da",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}