component
A4910KJPTR-T
Public Made by Adomby adom
Allegro MicroSystems, LLC Motor Driver ICs, LQFP-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "a4910kjptr-t",
"title": "A4910KJPTR-T",
"brief": "Allegro MicroSystems, LLC Motor Driver ICs, LQFP-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"power management ics",
"a4910kjptr-t",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "A4910KJPTR-T",
"manufacturer": "Allegro MicroSystems, LLC",
"package": "LQFP-48-EP(7x7)",
"pin_count": 49,
"category": "Power Management ICs",
"subcategory": "Motor Driver ICs",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/8576e381b26ef15367ecc62594d93bf6.pdf",
"parts": {
"symbol": "a4910kjptr-t.kicad_sym",
"footprint": "a4910kjptr-t.kicad_mod",
"model_3d": "a4910kjptr-t-hero.glb",
"model_3d_plain": "a4910kjptr-t-etched.glb",
"model_3d_step": "a4910kjptr-t-etched.step",
"model_3d_step_plain": "a4910kjptr-t.step",
"lbr": "a4910kjptr-t.lbr"
},
"distributor_links": {
"lcsc": "C2150667",
"digikey": "620-1534-2-ND",
"mouser": "250-A4910KJPTR-T"
},
"distributor_check": {
"checked_at": "2026-10-30T22:19:45Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "620-1534-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "250-A4910KJPTR-T",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "SA",
"type": "passive",
"description": "Motor connection for phase A, sensing the switched load voltage and connected to the negative side of the bootstrap capacitor (abs max VCx - 16 V to VCx + 0.3 V)."
},
{
"number": "2",
"name": "CA",
"type": "passive",
"description": "Bootstrap capacitor connection for phase A and positive supply for the high-side gate driver (abs max -0.3 V to VREG + 50 V)."
},
{
"number": "3",
"name": "VREG",
"type": "power_out",
"description": "Gate drive supply output, regulated nominally 13 V, requiring a storage capacitor to supply low-side drivers and bootstrap charging (abs max -0.3 to 16 V)."
},
{
"number": "4",
"name": "CP2",
"type": "passive",
"description": "Charge pump capacitor terminal; connect a minimum 220 nF, typically 470 nF, capacitor between CP1 and CP2."
},
{
"number": "5",
"name": "CP1",
"type": "passive",
"description": "Charge pump capacitor terminal; connect a minimum 220 nF, typically 470 nF, capacitor between CP1 and CP2 (abs max -0.3 to 16 V)."
},
{
"number": "6",
"name": "PGND",
"type": "power_in",
"description": "Digital and power ground, to be connected to supply ground and AGND."
},
{
"number": "7",
"name": "VBB",
"type": "power_in",
"description": "Main power supply for internal regulators and charge pump, operating 7 to 50 V (functional down to 5.5 V), connected through reverse voltage protection and decoupled."
},
{
"number": "8",
"name": "VBRG",
"type": "input",
"description": "Sense input to the top of the external MOSFET bridge for measuring the drain voltage of the high-side MOSFETs (abs max -5 to 55 V)."
},
{
"number": "9",
"name": "AGND",
"type": "power_in",
"description": "Analog reference ground, quiet return for measurement and input references, connected to PGND."
},
{
"number": "10",
"name": "VDD",
"type": "power_in",
"description": "Logic supply of 3 to 5.5 V, decoupled with a 100 nF capacitor (abs max -0.3 to 6 V)."
},
{
"number": "11",
"name": "COASTn",
"type": "input",
"description": "Active-low input that forces all gate drive outputs low, turning off all external MOSFETs and overriding all other gate control inputs and registers."
},
{
"number": "12",
"name": "RESETn",
"type": "input",
"description": "Standby mode control: pulsing low resets faults and holding low longer than tRSD forces sleep mode; can be pulled to VBB with a 20 to 33 kΩ resistor."
},
{
"number": "13",
"name": "STRn",
"type": "input",
"description": "Serial strobe (chip select) input; when high, SCK and SDI activity is ignored and SDO is high impedance."
},
{
"number": "14",
"name": "SCK",
"type": "input",
"description": "Serial clock input; data is latched from SDI on the rising edge, with 16 rising edges per write, and SCK must be held high when STRn changes."
},
{
"number": "15",
"name": "SDI",
"type": "input",
"description": "Serial data input, 16-bit word, MSB first."
},
{
"number": "16",
"name": "SDO",
"type": "tri_state",
"description": "Serial data output, high impedance when STRn is high, outputting the fault flag as soon as STRn goes low (abs max -0.3 to VDD + 0.3 V)."
},
{
"number": "17",
"name": "DIAG",
"type": "output",
"description": "Programmable diagnostic output selecting fault flag (default), temperature, clock, or VDS threshold."
},
{
"number": "18",
"name": "AHI",
"type": "input",
"description": "Control input for high side of phase A, logically ORed with the Run register bit to control GHA."
},
{
"number": "19",
"name": "ALO",
"type": "input",
"description": "Control input for low side of phase A, logically ORed with the Run register bit to control GLA."
},
{
"number": "20",
"name": "BHI",
"type": "input",
"description": "Control input for high side of phase B, logically ORed with the Run register bit to control GHB."
},
{
"number": "21",
"name": "BLO",
"type": "input",
"description": "Control input for low side of phase B, logically ORed with the Run register bit to control GLB."
},
{
"number": "22",
"name": "CHI",
"type": "input",
"description": "Control input for high side of phase C, logically ORed with the Run register bit to control GHC."
},
{
"number": "23",
"name": "CLO",
"type": "input",
"description": "Control input for low side of phase C, logically ORed with the Run register bit to control GLC."
},
{
"number": "24",
"name": "OPAP",
"type": "input",
"description": "Uncommitted operational amplifier non-inverting input (abs max -0.3 to 6.5 V)."
},
{
"number": "25",
"name": "OPAM",
"type": "input",
"description": "Uncommitted operational amplifier inverting input (abs max -0.3 to 6.5 V)."
},
{
"number": "26",
"name": "OPAO",
"type": "output",
"description": "Uncommitted operational amplifier output (abs max -0.3 to VDD + 0.3 V)."
},
{
"number": "27",
"name": "CSCP",
"type": "input",
"description": "Phase C current-sense amplifier positive input (abs max -4 to 6.5 V)."
},
{
"number": "28",
"name": "CSCM",
"type": "input",
"description": "Phase C current-sense amplifier negative input (abs max -4 to 6.5 V)."
},
{
"number": "29",
"name": "CSCO",
"type": "output",
"description": "Phase C current-sense amplifier output (abs max -0.3 to VDD + 0.3 V)."
},
{
"number": "30",
"name": "CSBP",
"type": "input",
"description": "Phase B current-sense amplifier positive input (abs max -4 to 6.5 V)."
},
{
"number": "31",
"name": "CSBM",
"type": "input",
"description": "Phase B current-sense amplifier negative input (abs max -4 to 6.5 V)."
},
{
"number": "32",
"name": "CSBO",
"type": "output",
"description": "Phase B current-sense amplifier output (abs max -0.3 to VDD + 0.3 V)."
},
{
"number": "33",
"name": "CSAP",
"type": "input",
"description": "Phase A current-sense amplifier positive input (abs max -4 to 6.5 V)."
},
{
"number": "34",
"name": "CSAM",
"type": "input",
"description": "Phase A current-sense amplifier negative input (abs max -4 to 6.5 V)."
},
{
"number": "35",
"name": "CSAO",
"type": "output",
"description": "Phase A current-sense amplifier output (abs max -0.3 to VDD + 0.3 V)."
},
{
"number": "36",
"name": "LSSC",
"type": "passive",
"description": "Low-side source return for phase C gate discharge, connected to the low-side MOSFET source through a low-impedance track (abs max VREG - 16 to 18 V)."
},
{
"number": "37",
"name": "GLC",
"type": "output",
"description": "Low-side gate drive output for phase C external N-channel MOSFET (abs max VREG - 16 to 18 V)."
},
{
"number": "38",
"name": "GHC",
"type": "output",
"description": "High-side gate drive output for phase C external N-channel MOSFET (abs max VCx - 16 to VCx + 0.3 V)."
},
{
"number": "39",
"name": "SC",
"type": "passive",
"description": "Motor connection for phase C, sensing the switched load voltage and connected to the negative side of the bootstrap capacitor."
},
{
"number": "40",
"name": "CC",
"type": "passive",
"description": "Bootstrap capacitor connection for phase C and positive supply for the high-side gate driver (abs max -0.3 to VREG + 50 V)."
},
{
"number": "41",
"name": "LSSB",
"type": "passive",
"description": "Low-side source return for phase B gate discharge, connected to the low-side MOSFET source through a low-impedance track (abs max VREG - 16 to 18 V)."
},
{
"number": "42",
"name": "GLB",
"type": "output",
"description": "Low-side gate drive output for phase B external N-channel MOSFET (abs max VREG - 16 to 18 V)."
},
{
"number": "43",
"name": "GHB",
"type": "output",
"description": "High-side gate drive output for phase B external N-channel MOSFET (abs max VCx - 16 to VCx + 0.3 V)."
},
{
"number": "44",
"name": "SB",
"type": "passive",
"description": "Motor connection for phase B, sensing the switched load voltage and connected to the negative side of the bootstrap capacitor."
},
{
"number": "45",
"name": "CB",
"type": "passive",
"description": "Bootstrap capacitor connection for phase B and positive supply for the high-side gate driver (abs max -0.3 to VREG + 50 V)."
},
{
"number": "46",
"name": "LSSA",
"type": "passive",
"description": "Low-side source return for phase A gate discharge, connected to the low-side MOSFET source through a low-impedance track (abs max VREG - 16 to 18 V)."
},
{
"number": "47",
"name": "GLA",
"type": "output",
"description": "Low-side gate drive output for phase A external N-channel MOSFET (abs max VREG - 16 to 18 V)."
},
{
"number": "48",
"name": "GHA",
"type": "output",
"description": "High-side gate drive output for phase A external N-channel MOSFET (abs max VCx - 16 to VCx + 0.3 V)."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Exposed thermal pad has no stated electrical connection in the provided pages (terminal list only sa; Pin types for passive external-component terminals (CAx, SAx, LSSx, CP1, CP2) and VBRG, SDO are infe"
],
"pages_sent": 11,
"cost_usd": 0.1344,
"at": "2026-10-30T22:19:30"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/8576e381b26ef15367ecc62594d93bf6.pdf",
"pages": 36,
"sha256": "696bf2e310245234",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "a4910kjptr-t.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.32,
9.32,
1.6
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "f960910b71d80cee36ddda3bc3d76fc6db6e160cef6b65cca7a6d6ec3727584e",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "a4910kjptr-t-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.32,
9.32,
1.6
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "f8c07a5f9b1d07d783ed52706be33865e372a9e7fce013243329303f2d316712",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Allegro MicroSystems, LLC",
"Package": "LQFP-48-EP(7x7)",
"Category": "Power Management ICs",
"Pins": "49"
},
"appearance": {
"contacts": {
"quote": "with exposed thermal pad (suffix JP). It is lead (Pb) free, with 100% matte-tin leadframe plating.",
"page": 2,
"doc": "ds.pdf",
"plating": "tin"
},
"version": 1,
"datasheet_sha256": "696bf2e31024523425d02d2fcae92d75a7e723671dfa5ab462fd81185af55d58"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "696bf2e31024523425d02d2fcae92d75a7e723671dfa5ab462fd81185af55d58",
"rows": [
{
"name": "Load Supply Voltage",
"symbol": "VBB",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 50,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Logic Supply Voltage",
"symbol": "VDD",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 6,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Terminal VREG",
"symbol": "VREG",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 16,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Terminal CP1",
"symbol": "VCP1",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 16,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Logic Inputs",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 6,
"conditions": "STRn, SDI, SCK, RESETn, COASTn, xHI, xLO terminals",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Sense Amplifier Inputs",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -4,
"typ": null,
"max": 6.5,
"conditions": "CSAP, CSAM, CSBP, CSBM, CSCP, CSCM terminals",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Operational Amplifier Inputs",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 6.5,
"conditions": "OPAP and OPAM terminals",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Terminal VBRG",
"symbol": "VBRG",
"kind": "absolute_maximum",
"unit": "V",
"min": -5,
"typ": null,
"max": 55,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Ambient Operating Temperature Range",
"symbol": "TA",
"kind": "absolute_maximum",
"unit": "°C",
"min": -40,
"typ": null,
"max": 150,
"conditions": "Limited by power dissipation",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Maximum Junction Temperature",
"symbol": "TJ(max)",
"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 150,
"conditions": "Continuous",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Maximum Junction Temperature, overtemperature event",
"symbol": "TJ(max)",
"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 175,
"conditions": "Overtemperature event not exceeding 10 seconds, lifetime duration not exceeding 10 hours",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Storage Temperature Range",
"symbol": "Tstg",
"kind": "absolute_maximum",
"unit": "°C",
"min": -55,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Package Thermal Resistance (Junction to Ambient)",
"symbol": "RθJA",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 23,
"max": null,
"conditions": "On 4-layer PCB based on JEDEC standard",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Package Thermal Resistance (Junction to Ambient)",
"symbol": "RθJA",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 44,
"max": null,
"conditions": "On 2-layer PCB with 3 in.2 of copper area each side",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Package Thermal Resistance (Junction to Pad)",
"symbol": "RθJP",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 2,
"max": null,
"conditions": "",
"source_page": 3,
"source": "datasheet"
},
{
"name": "VBB Functional Operating Range",
"symbol": "VBB",
"kind": "recommended_operating",
"unit": "V",
"min": 5.5,
"typ": null,
"max": 50,
"conditions": "",
"source_page": 6,
"source": "datasheet"
},
{
"name": "VBB Quiescent Current",
"symbol": "IBBQ",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": 10,
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