# Version 2 requirements (rev 0.2, proposal)

> **Status (2026-09-25): proposal only, waiting for approval.** No schematic, placement or routing yet.
> Version 1 (the project root) is the approved prototype design and is **not changed** by anything in `v2/`.
> The Version 2 LED is **provisional** until its own 5–10 LED WLED timing test passes.
> **Do not order anything from this folder.**

## Goal

A smaller, lower-power RITHESH board with smaller LEDs. It still spells "RITHESH" clearly, keeps the same electronics
and protection, and uses JLCPCB basic parts where that does not reduce reliability.

## What stays the same as Version 1

- Same 5 × 7 letter patterns and **107 LEDs** (see `requirements.md` in the project root for the patterns).
- ESP32-C3-MINI-1-N4 running standard **WLED**: LED data on GPIO10, ON/OFF button on GPIO5.
- USB-C 5 V input with the same protection chain:
  - SMAJ5.0A surge diode
  - USBLC6-2SC6 USB ESD chip
  - TPS259531 eFuse (soft start, current limit, 5.7 V clamp)
- TLV76733 3.3 V regulator. **Kept** (approved 2026-09-25).
- SN74AHCT1G125 5 V level shifter with the 33 Ω series resistor and 10 kΩ pull-down. **Kept** (approved 2026-09-25).
- RESET / ON/OFF / BOOT buttons, 10 test pads, 4 × M3 mounting holes with 7 mm keep-outs.
- 2 copper layers, 1.6 mm FR-4, 1 oz copper. All parts on the front. JLCPCB assembly.
- A 100 nF capacitor next to every LED.

## Decisions (approved 2026-09-25)

| Decision | Choice |
|----------|--------|
| LED | **XL-2020RGBC-2812B** (XINGLIGHT, JLCPCB/LCSC **C5349955**), 2.0 × 2.0 mm. **PROVISIONAL** until the timing test passes |
| LED spacing | **5 mm** centre to centre (V1: 7 mm) |
| Layout | Electronics at the **right end** of the word (V1: in a strip under the word) |
| Board size | **250 × 40 mm** target (V1: 300 × 70 mm). Placement may trim a few mm; the 4 mm option is not used |
| 750 Ω eFuse current-limit resistor | **Two 1.5 kΩ 1 % resistors in parallel** (basic part C25867) |
| 499 Ω serial TX resistor | **470 Ω** (basic part C25117) |
| Buttons | **3.9 × 3 mm** basic buttons TS-1088-AR02016 (C720477) instead of 5.1 × 5.1 mm |
| Other substitutions | **None** that reduce reliability just to avoid an extended-part fee |
| Storage | Everything for Version 2 lives in `v2/` |
| LED chain | **Starts at the electronics side**: V2 LED1 is where V1 LED107 was (approved 2026-09-25) |
| 5.7 V clamp vs 5.5 V LED | **Accepted only as a documented prototype risk**, not as a verified production condition (approved 2026-09-25 with conditions; see below) |
| Clearances (corrected 2026-09-25) | LED courtyard **≥ 1.0 mm** outside each 7 mm hole keep-out (required ≥ 0.5 mm); antenna clearance **15.5 mm** (required ≥ 15 mm) |

## LED check (datasheet XL-2020RGBC-WS2812B, rechecked 2026-09-25)

| Item | Datasheet | WLED / board | Result |
|------|-----------|--------------|--------|
| "0" bit high time | typ 0.25 µs, **max 0.47 µs** | about 400 ns | ✅ 70 ns margin (V1 LED: 10 ns) |
| "1" bit high time | 0.58–1.0 µs (typ 0.85) | about 800 ns | ✅ |
| "1" bit low time | typ 0.4 µs (no limits given) | about 450 ns | ✅ near typical |
| "0" bit low time | typ 1.0 µs (no limits given) | about 850 ns | ✅ near typical |
| Bit period | min 1.2 µs | 1.25 µs | ✅ |
| Reset (latch) | more than 80 µs | 300 µs | ✅ |
| Data input "high" level | at least 0.5 × VDD (2.5 V at 5 V; 2.75 V at 5.5 V) | 5 V from the level shifter | ✅ |
| Supply voltage | **3.5–5.5 V**, listed in the *absolute maximum* table; full function 4.5–5.5 V | 5 V rail | ✅ normal use; see the 5.7 V risk below |
| LED current | constant current **5 mA per colour** (typ; ±3 % between chips) | | 15 mA per LED at full white |
| Chip standby current | 0.5 mA (typ) | | 54 mA for 107 LEDs |
| Moisture sensitivity | MSL 5 | | JLCPCB handles baking |

WLED's timing figures are the NeoPixelBus WS2812x values used for Version 1's check (400 / 850 ns for a "0",
800 / 450 ns for a "1"). This is a **datasheet check only**. The bench test below must still pass.

**Rejected candidates:**

| LED | Reason |
|-----|--------|
| WS2812C-2020 | "0" bit max 380 ns (WLED sends 400); supply max 5.3 V |
| WS2812B-Mini 3535 | "0" bit max 380 ns; supply max 5.3 V |
| SK6805-EC15 | "0" bit max 400 ns, so no margin at all |
| XL-1615RGBC-2812B | "1" bit min 900 ns; WLED sends 800 |

### Timing test (required before any Version 2 order)

Same method as Version 1 (`requirements.md`, "Prototype plan", Step 1), but with 5–10 **XL-2020RGBC-2812B** LEDs:

- **Setup:** ESP32-C3 running standard WLED, 74AHCT1G125 level shifter powered from 5 V, 33 Ω series resistor,
  100 nF per LED.
- **Pass:**
  - 30 minutes of colours, effects and brightness changes with no wrong colours or random flashes
  - correct after a power cycle and after a reset
  - oscilloscope reading of the "0" high time is about 400 ns
- **Pass:** the LED stops being provisional. **Fail:** do not order. Decide between a different LED and (last resort)
  a custom WLED timing build.

## LED footprint (verified against the datasheet, page 11)

File: `v2/hardware/rithesh_v2_fp.pretty/LED_XL-2020RGBC-2812B.kicad_mod` (generated by `v2/hardware/tools/make_v2_footprint.py`).

| Item | Value |
|------|-------|
| Body | 2.0 × 2.0 × 0.65 mm |
| Pads | 4 × **0.85 × 0.75 mm** (across × down), gaps **0.5 mm** both ways, centres ±0.675 × ±0.625 mm (the datasheet's recommended soldering pattern) |
| Pins, seen from the top | **DI** top-left (pin 3), **GND** top-right (pin 2), **VDD** bottom-left (pin 4), **DO** bottom-right (pin 1) |
| Orientation mark | Round mark on the top at the **DO / pin 1** corner. The bottom-view triangle points to the same side. Footprint has a silkscreen dot outside that corner and a chamfered fab outline |
| Courtyard | 2.70 × 2.50 mm |

⚠️ **The pin order differs from the Version 1 LED** (XL-5050: 1 VDD, 2 DO, 3 GND, 4 DI). The V2 schematic
symbol must use the new numbering. JLCPCB's placement preview must be checked for this LED's rotation.

## LED pattern and dimensions

Drawings (generated by `v2/hardware/tools/make_v2_plan.py`):
- `v2/hardware/layout-plan/led-pattern-v2.svg` is 1:1 when printed at 100 %; the `.png` is a preview.
- `board-plan-v2.png`
- `electronics-area-v2.png`

| Item | Value |
|------|-------|
| Grid | 41 columns × 7 rows at 5 mm (7 letters × 5 columns + 6 empty columns between letters) |
| One letter | **22 mm wide × 32 mm tall** (V1: 33 × 47 mm) |
| Space between letters | 10 mm centre to centre, **8 mm clear** between LED bodies |
| Whole word | **202 × 32 mm** (V1: 285 × 47 mm) |
| LED positions | column 0 at x = **9.1 mm**, row 0 at y = 5.0 mm (from the board's top-left corner). Moved 0.6 mm right on 2026-09-25 for hole clearance; pattern and 5 mm spacing unchanged |
| **Board** | **250.0 × 40.0 mm**, 2 mm corner radius |

### LED chain order (changed from Version 1)

The data line starts next to the electronics, so the chain now **starts at the right end**:
- **V2 LED1** is at the bottom-right of the last "H" (where V1's LED107 is).
- **V2 LED107** is at the top-left of the "R".
- **V2 LED n sits where V1 LED (108 − n) sits.**
- **LEDs per letter:** H 1–17, S 18–32, E 33–50, H 51–67, T 68–78, I 79–89, R 90–107.
- **The visible letters are identical; only the physical numbering (data order) changed.**

This keeps the 5 V data line from the level shifter to LED1 only a few millimetres long, instead of a 21 cm track.

The separate Version 2 files are in `v2/firmware/`, generated by `v2/hardware/tools/make_v2_ledmaps.py`, which
checks each map two independent ways:
- `ledmap.json` ("RITHESH V2 41x7")
- `ledmap1.json` ("RITHESH V2 left-to-right")
- `led-order.csv`

Version 1's `firmware/` files are unchanged.

## Board outline and electronics area (preliminary)

| Item | Position (mm, from the top-left corner) | Notes |
|------|------------------------------------------|-------|
| Mounting holes (M3, 3.2 mm, non-plated) | (3.2, 3.2), (3.2, 36.8), **(215.0, 3.2), (215.0, 36.8)** | 7 mm keep-outs. Right-hand holes sit between the word and the electronics. Clearances in the table below |
| ESP32-C3-MINI-1 | body x 233.4–250.0, y 2.0–15.2; antenna end flush with the right edge | Top-right corner. The board corner gives free air above the antenna |
| Antenna keep-out | x 244.6–250, y 2.0–15.2 | No copper on either layer (module rule, as V1) |
| **Antenna clearance zone** | x **244.0–250** (6.0 mm deep), y 15.2–**30.7** (**15.5 mm**) | Espressif Hardware Design Guidelines Fig. 21: at least 15 mm beside the antenna along the board edge, as deep as the antenna area (about 6 mm). **No parts, pads, tracks, vias or copper fill on either layer.** Every part stays at least 0.5 mm outside it |
| Strip above the antenna | x 244.0–250, y 0–2.0 | No copper. The board ends here, so this side has free air (more than 15 mm) |
| USB-C | centred at x = 238.0 on the bottom edge | Plug from below. 8 mm away from the antenna clearance |
| Buttons | RESET / ON/OFF / BOOT stacked at x 211.4–217.4, y 8–25 | Labels printed to the right |
| Test pads | TP6 LED_DIN beside the level shifter; 8 in two rows along the bottom (5V_IN, 5V_OUT, FLT, ILM / 3V3, GND, RX, TX); TP5 GND right of the USB-C | ≥ 3.6 mm apart |
| Level shifter | beside LED1 (x ≈ 213.6, y ≈ 29) | Short data line |
| eFuse, surge diode, USB ESD | just above the USB-C | |
| C301 220 µF (fitted) | at the eFuse output (x ≈ 227, y ≈ 22) | |
| C302 220 µF (fitted) | between "R" and "I" (x 36, y 20) | Far end of the 5 V rail |
| C303 220 µF (DNP spare) | between "T" and "H" (x 93, y 22) | Middle of the rail |

### Mounting-hole clearances (corrected 2026-09-25)

The closest LED is measured for both 0° and 90° LED rotations; the worst case is shown.

| From the closest LED's … | to the 7 mm keep-out | to a 6 mm washer | to an M3 screw head (5.7 mm, largest common: button head) | to the 3.2 mm hole |
|---|---|---|---|---|
| courtyard (2.70 × 2.50 mm) | **1.08 mm** | 1.58 mm | 1.73 mm | 2.98 mm |
| body (2.0 × 2.0 mm) | 1.46 mm | 1.96 mm | 2.11 mm | 3.36 mm |
| solder pads (2.2 × 2.0 mm outer edges) | 1.37 mm | 1.87 mm | 2.02 mm | 3.27 mm |

- **Requirement:** at least 0.5 mm, target about 1 mm. Met, with 1.08 mm at the courtyard (was 0.39 mm).
- **Screw heads and washers:** a 5.7 mm screw head stays 0.35 mm inside the board edge and a 6 mm washer 0.20 mm.
- **Larger washers:** the 7 mm keep-out also fits a DIN 125 washer (7.0 mm), but that would reach 0.3 mm past the
  board edge (same as V1).

### Antenna clearance (corrected 2026-09-25)

- **Clearance zone below the antenna:** **15.5 mm** long and 6.0 mm deep (requirement at least 15 mm; the extra
  0.5 mm is a safety margin, not a rounding).
- **Nearest part in the edge strip below the antenna:** **19.05 mm** from the antenna keep-out (TP5).
- **Nearest part to any antenna zone boundary:** 0.90 mm outside it (U1, moved 0.6 mm left).
- **Above the antenna:** the board corner, then free air.
- **At placement:** the zone becomes a KiCad rule area on **both copper layers** forbidding tracks, vias, pads and
  copper fill. The placement checker then verifies bodies, pads, tracks, vias and fills against it (as for V1).

**Check results** (`make_v2_plan.py`, 2026-09-25):
- No overlaps between parts, LEDs, hole keep-outs, the antenna zones (0.5 mm margin) or the board edge.
- The electronics area (x 211.0–250) is **60 % used** by parts, keep-outs and passive-part zones; **631 mm²** is free for routing.
- The plan therefore fits without crowding. Final positions come at placement.

## Power

| Item | Value |
|------|-------|
| One LED at full white | 3 × 5 mA + 0.5 mA = **15.5 mA** |
| All 107 LEDs at full white | **1.66 A** (up to about 1.71 A with the ±3 % chip spread) |
| All LEDs off (standby) | about 54 mA |
| ESP32-C3 | about 100–130 mA on average; Wi-Fi transmit peaks up to **335 mA** |
| **Board worst case** | 1.71 + 0.335 + about 0.01 = **about 2.06 A** |
| Typical (colourful effects) | about 0.6–0.9 A |
| eFuse current limit | **2.49–2.90 A** (see below): at least **0.43 A (17 %)** above the worst case |
| Charger | USB-C **5 V ⎓ 3 A** (15 W) recommended: 0.94 A above the worst case. It also works on a 1.5 A USB-C source if WLED's limit is lowered to 1,300 mA |
| USB-C connector | same part as V1. V1's accepted risk 7 (one VBUS pad pair reaches its 2.5 A rating only during the eFuse's brief 2.9 A limit) still applies; the normal maximum is now 2.06 A instead of 2.2 A |

### WLED settings and what happens at full white

Checked in the WLED source code, release v16.0.1:
- `settings_leds.htm`: the per-LED current menu has 55 / 35 / 30 / 15 mA presets plus **Custom (1–255 mA)**.
- `bus_manager.cpp`: WLED estimates each LED as (colour sum ÷ 765) × mA-per-LED **+ 1 mA standby**, and reserves
  `MA_FOR_ESP` = **120 mA** for the ESP32.

| Setting | Value |
|---------|-------|
| LED current | **Custom: 16 mA** (15.5 mA rounded up) |
| Maximum PSU current | **2,000 mA** (unchanged from V1), brightness limiter **on** |

At full white, WLED estimates 107 × 16 + 107 × 1 = **1,819 mA** for the LEDs. Its LED budget is 2,000 − 120 =
**1,880 mA**. Because 1,819 is less than 1,880, **WLED does not dim**: full white runs at full brightness. The real
LED current is about 1.66 A.

The 2,000 mA limit becomes a safety net. It only acts if a setting is wrong, for example too many LEDs entered.
If the default 55 mA is left in place, WLED dims full white to about 31 % for no reason, so **set 16 mA**.

### eFuse current limit with two 1.5 kΩ resistors (TI TPS2595 datasheet)

- **Formula:** I = 2000 / R + 0.04 A. It matches the datasheet table (487 Ω gives 4.17 A; 1780 Ω gives 1.17 A).
- **Resistance:** 1.5 kΩ ∥ 1.5 kΩ = **750 Ω**. The worst case, with both resistors 1 % high or both 1 % low, is
  742.5–757.5 Ω. That is the **same ±1 %** as a single 1 % resistor; with random tolerances it is usually tighter.
- **Limit:** about 2.71 A typical. With the chip's own spread (about −7 / +6 %) the range is **2.49–2.90 A**,
  identical to Version 1. Resistor drift with temperature (±100 ppm/°C) adds less than ±0.5 %.
- **Current monitor:** unchanged, about 0.21 V per amp (276 µA/A × 750 Ω).

**Failure modes (datasheet fault table):**

| Fault | Result | Safe? |
|-------|--------|-------|
| One resistor missing or open | R = 1.5 kΩ, so the limit falls to about **1.37 A** (roughly 1.27–1.47 A). The board current-limits at high brightness, and the ILM test pad reads about 0.41 V/A instead of 0.21 V/A | ✅ fails safe (less current). The prototype full-white test and the ILM check find it |
| Both open (ILM pin open) | limit 0 A, so the eFuse shuts down | ✅ safe |
| Solder bridge across a resistor (ILM shorted to GND) | circuit breaker trips at 3 A | ✅ same as with a single resistor |
| Bridge between the two resistors | none: both sit between the same two nets | ✅ harmless |

Place the two resistors side by side with a direct ground connection. Add to the prototype test: **ILM pad about
0.21 V per amp** (0.41 V/A means one resistor is missing).

### Voltage drop and copper

- **Supply path:** power enters at the right end, and the farthest LED is about 200 mm away.
- **Estimate:** 5 V fill about 30 mm wide (about 6.7 squares, 3.3 mΩ) plus a ground plane about 40 mm wide
  (about 5 squares, 2.5 mΩ). With the load spread along the word, the drop is about 1.66 A × 5.8 mΩ ÷ 2 ≈
  **5 mV**, plus vias and narrow sections: **estimated under 30 mV** (V1: 9 mV).
- **To do:** calculate it with `hardware/tools/power_analysis.py` after routing.
- **Copper:** 1 oz is enough. IPC-2221 needs **≥ 0.8 mm** for 2 A at a 10 °C rise on an outer layer; plan
  **1.2 mm** power tracks as in V1.
- **5 V feed:** runs from C301 to the LED area between the ON/OFF/BOOT buttons and the level shifter.

### Capacitors

| Where | Value | Change from V1 |
|-------|-------|----------------|
| Every LED | 100 nF 0402 X7R (basic C1525), within about 2 mm of its LED | same (107 + level shifter) |
| Bulk on the LED rail | **3 footprints** for 220 µF 16 V (C72496): **2 fitted** (C301 at the feed, C302 at the far end) and **1 spare DNP** (C303, middle) | V1 had 4 footprints (2 fitted). Worst-case synchronised LED current is now 1.6 A instead of about 4.3 A, so the V1 method gives about 0.4 V of dip instead of 1.1 V |
| USB input | 4.7 µF (basic) | same; the charger still sees about 5 µF at plug-in (USB-C limit 10 µF) |
| eFuse soft start | 100 nF | same; covers all 3 bulk capacitors |
| Regulator | 10 µF in + 10 µF out (basic) | same |

## Remaining risk: LED 5.5 V rating vs eFuse 5.7 V clamp

- **Normal use:** USB-C chargers deliver 4.75–5.5 V. The eFuse drops about 0.07 V at 2 A, so the LEDs see at most
  about 5.5 V, at their limit but within it.
- **Fault:** if a charger fails and goes above about 5.5–5.9 V, the TPS259531 clamps its output at **5.2–5.7 V**
  (5.45 V typical). The LEDs could then see **up to 0.2 V above their 5.5 V absolute maximum** for as long as the
  fault lasts.
- **Consequence:** possible LED damage in that fault case. How much margin the LED really has is unknown.
- **Same as V1:** this is Version 1's accepted **risk 2** unchanged. The XL-2020 datasheet also lists 5.5 V as an
  absolute maximum.
- **Options if it is not acceptable:** an eFuse or clamp with a lower output limit, or a series diode (costs about
  0.3 V of LED supply). Neither is proposed now.
- **Status (approved 2026-09-25):** accepted **only as a documented prototype risk**, **not** as a verified
  production condition.

**Conditions attached to this risk:**
1. **Measure** the actual LED supply (5 V rail at the first and last LED) during the prototype test.
2. **Test with at least two** normal 5 V USB-C chargers.
3. **Confirm** the LED rail **never exceeds 5.5 V** in normal operation (idle, full white, effects, plug-in), with the
   oscilloscope and a meter.
4. **Do not** intentionally test a destructive overvoltage fault on the assembled board.
5. **Do not approve a larger batch** until the prototype passes.
6. **Before completing the Version 2 schematic**, briefly check whether a simple, reliable alternative can keep the LED
   rail at or below 5.5 V without adding significant cost, heat or extended parts. **Present it for comparison only;
   do not change the approved design automatically.**

## Parts changes (JLCPCB catalogue, checked 2026-09-25)

| Current (V1) | Version 2 | JLCPCB # | Type | Stock | Price (100 pcs) | Size | Compatible? | Why |
|--------------|-----------|----------|------|-------|-----------------|------|-------------|-----|
| XL-5050RGBC-2812B (C2843785) | **XL-2020RGBC-2812B** | C5349955 | extended | 127,770 | $0.081 | 2.0 × 2.0 mm | Yes (timing and supply above). **New footprint, new pin order** | smaller, better timing margin, lower current |
| 750 Ω 1 % (C25132, extended) | **2 × 1.5 kΩ 1 % in parallel** | C25867 | **basic** | 2,187,279 | $0.003 each | 0402 | Yes: same 750 Ω and same tolerance; fails safe | removes one extended type |
| 499 Ω (C4125, extended) | **470 Ω 1 %** | C25117 | **basic** | 1,047,546 | $0.003 | 0402 | Yes: series protection on TX; value not critical | removes one extended type |
| TS-1187A 5.1 × 5.1 mm button (C318884, basic) | **TS-1088-AR02016** 3.9 × 3 mm, 160 gf, no locating post | C720477 | **basic** | 942,241 | $0.054 | 3.9 × 3.0 × 2.0 mm, pads 5.5 × 2.0 mm | Yes: same 2-pin switch | saves space |

**Unchanged extended parts:**
- ESP32-C3-MINI-1-N4, TPS259531, TLV76733, TYPE-C-31-M-12, USBLC6-2SC6, SN74AHCT1G125, 220 µF RVT (C72496)
- plus the LED

**"Preferred" parts (no fee):** SMAJ5.0A and the 39 kΩ resistor.

| Extended types with a setup fee | V1: **10** (about $30 per order) | V2: **8** (about $24 per order) |
|---|---|---|

**Before any future quote (required):**
1. Recheck every part's basic/extended status and stock on JLCPCB **on the day of the quote**. The status
   above comes from JLCPCB's public catalogue; the Adom tool's basic/extended flag was found to be unreliable.
2. The eFuse has the lowest stock (3,299 today). Check it again.
3. **All prices here are preliminary estimates.** Only a JLCPCB quote is real.

## Version 1 vs Version 2

| | Version 1 (approved prototype) | Version 2 (proposal) |
|---|---|---|
| Board | 300 × 70 mm (210 cm²) | **250 × 40 mm (100 cm², −52 %)** |
| LEDs | 107 × XL-5050 (5 mm) at 7 mm pitch | 107 × XL-2020 (2 mm) at 5 mm pitch |
| Letter size | 33 × 47 mm | 22 × 32 mm |
| Readability | readable from about 5 m; large bright dots | readable from about 3.5 m; smaller dots, more "dotted"; about ¼ of the brightness (good indoors, weak in daylight) |
| Full-white current | 3.85 A (WLED dims to about 30 %) | 1.66 A (no dimming needed) |
| Board maximum | 2.2 A (with WLED limiting) | about 2.06 A (without limiting) |
| Timing margin ("0" bit) | 10 ns | 70 ns |
| Supply rating vs 5.7 V clamp | 5.5 V (accepted risk) | 5.5 V (same risk) |
| Parts per board (estimate) | about $9.70 | about $13.60 (small LEDs cost more) |
| Extended-part fees | about $30 (10 types) | about $24 (8 types) |
| 5 assembled boards, excluding shipping and tax (preliminary) | about $120–160 | about $120–150 |
| Repair by hand | 5050 LED: possible with care | 2020 LED: needs hot air |
| New risks | – | new footprint and pin order, new timing test, tiny parts, changed LED numbering (V2 maps required) |

## Next steps (each needs approval)

1. Approve this proposal (dimensions, pattern, electronics plan, footprint), including the corrected clearances.
2. Version 2 schematic (copy of V1 with the approved changes), ERC, pin audit.
3. Placement, then routing, DRC and checks. Then images, a power recalculation and review.
4. Version 2 firmware: maps and LED order done (`v2/firmware/`). A full V2 setup guide comes with the schematic.
   Before the schematic is completed: the 5.5 V alternative comparison (5.7 V risk, condition 6).
5. Timing test with real XL-2020 LEDs **before** any Version 2 order.