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RITHESH LED Display

Public Unreviewed

by Rithesh03

A 300 x 70 mm PCB that spells RITHESH with 107 WS2812B RGB LEDs, controlled over Wi-Fi.

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rithesh-led-display / hardware / schematic-review.md
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Rithesh03 Update 3: PCB design completed - routed board, manufacturing package (prototype, do not order yet), WLED guide, final checklist, Hydrogen feedback 1ed072d 13d ago

Schematic review guide

This guide walks through the RITHESH LED Display schematic one section at a time, in plain language. Read it next to schematic.pdf (5 pages). Every value here comes from ../requirements.md.

Status: schematic revision 2 for review. PCB layout has not started.

What changed in revision 2 (simple summary)

  1. USB data resistors added: R14 and R15 (22 Ω) now sit in the USB D+ and D- lines, close to the ESP32, as Espressif recommends. Two spare capacitor spots (C13, C14) are drawn but not fitted. They are there only in case USB ever needs tuning.
  2. Serial debug pads added: TP9 (GPIO20, receive) and TP10 (GPIO21, transmit, through a 499 Ω resistor R16). They are a backup way to talk to the ESP32 if USB or WLED fails.
  3. Every pin checked against the datasheets by a script (see "Pin audit" below). No mistakes were found.
  4. R13 (33 Ω) explained in simple words (page 4 section below).

Files in this folder

File What it is
schematic.pdf The schematic to review (5 pages, A3/A4/A1 sizes, zoom in to read).
rithesh-led-display.kicad_pro KiCad project file. Open this in KiCad 7 or newer.
rithesh-led-display.kicad_sch Page 1: overview. Links to the other four sheets.
power.kicad_sch Page 2: USB-C input, protection, eFuse, 3.3 V regulator, test pads.
mcu.kicad_sch Page 3: ESP32-C3 module and buttons.
led_driver.kicad_sch Page 4: 3.3 V to 5 V LED signal driver.
leds.kicad_sch Page 5: the 107 LEDs, their capacitors and the bulk capacitors.
rithesh.kicad_sym, sym-lib-table Project symbols drawn for this board (eFuse, regulator, ESP32 module, XL LED).
erc-report.rpt KiCad's Electrical Rules Check report.
tools/ The scripts that generate and check the schematic (see the end of this file).

How to read the schematic

  • Parts connect by name. Each pin has a short wire ending in a name. Two names that match are the same wire, even if they are far apart.
  • Flag-shaped names (for example USB_DP, LED_DIN) connect across pages. Plain names (for example EN_UVLO) stay on their own page.
  • Power symbols (VBUS, +5V, +3V3, GND) connect everywhere.
    • VBUS = the charger's 5 V, before the eFuse.
    • +5V = the board's 5 V rail, after the eFuse.
  • An X on a pin means "intentionally not connected".
  • Dashed boxes group each section. Blue text notes explain what each part does.
  • A name with a bar over it (FLT) means "active low": it goes low when something happens.

Page 1: Overview

Shows the four sheets, the power flow and the signal flow:

  • Power: USB-C (VBUS) -> surge diode + ESD chip -> eFuse -> +5V -> LEDs and level shifter; +5V -> 3.3 V regulator -> +3V3 -> ESP32.
  • Signal: ESP32 GPIO10 (LED_DATA_3V3) -> level shifter -> LED_DIN -> LED1 -> ... -> LED107.

Page 2: Power input, protection and 3.3 V

1. USB-C power input

Part Value What it does
J1 USB-C, HRO TYPE-C-31-M-12 (C165948) The USB-C socket. Power pins rated 5 A.
R1, R2 5.1 kΩ 1% Tell the charger "please send 5 V". Without them a USB-C charger stays off.
  • CC1 and CC2 also go to the ESP32 (GPIO0, GPIO1), so charger strength can be measured later in software.
  • The two data pins pairs (D+ and D-, one pair per plug direction) join into USB_DP and USB_DN, which go to the ESP32 for programming.
  • SBU1/SBU2 are not used (X). The metal shield goes to GND.
  • PWR_FLAG symbols are not real parts. They tell KiCad's checker "VBUS and GND are supplied by the connector", which a checker cannot know on its own.

2. Surge and static protection

Part Value What it does
D1 SMAJ5.0A (C2925443) Surge diode. Off at 5 V; clamps spikes above about 6.4 V. Pin 1 = cathode (band) to VBUS.
U1 USBLC6-2SC6 (C7519) Protects the USB data lines from static shocks.
C1 4.7 µF ceramic The only capacitor the charger "sees" at plug-in (about 5 µF total, within USB-C's 1-10 µF).

3. eFuse (TPS259531)

The eFuse (U2) sits between the charger and the rest of the board. It replaces the old resettable fuse and does three jobs: soft start, current limit, and a 5.7 V overvoltage clamp.

Part Value What it sets
U2 TPS259531DSGR (C2155674) The eFuse itself.
R4 / R5 100 kΩ / 39 kΩ Turn on above about 4.3 V, off below about 3.9 V. Keeps the EN pin under its 7 V limit.
C2 100 nF Soft start: output rises over about 12 ms; plug-in current at most about 0.6 A.
R3 750 Ω 1% Current limit 2.49-2.90 A (guaranteed range). Pin voltage also shows current: about 0.21 V per amp.
R6 100 kΩ Pull-up for the fault output FLT (reads high normally, low on a fault).

Faults (overload, short, overheating) restart automatically about every 93 ms.

4. 3.3 V regulator (TLV76733)

Part Value What it does
U3 TLV76733DRVR (C2848334) Turns +5V into +3V3 for the ESP32 (up to 1 A). EN tied to +5V, so it is always on. SNS connects to the 3.3 V output.
C7, C8 10 µF ceramic Input and output capacitors.

5. Test pads

Pad Net Measures
TP1 5V_IN VBUS Charger voltage before the eFuse
TP2 5V_OUT +5V Board 5 V rail
TP3 3V3 +3V3 ESP32 supply
TP4, TP5 GND GND Ground for probes
TP7 FLT FLT eFuse fault (high = OK)
TP8 ILM ILM eFuse current, about 0.21 V per amp

TP6 (LED_DIN) is on page 4. TP9 and TP10 (serial debug) are on page 3.

Page 3: ESP32-C3 controller and buttons

1. ESP32-C3-MINI-1 module (U4, C2838502)

Module pin Connected to Why
3V3 +3V3 Power
EN EN (delay + RESET button) Chip enable
IO0 / IO1 CC1 / CC2 Charger sensing (analog, for later)
IO2 / IO8 10 kΩ pull-ups Boot pins held high so the chip always starts normally
IO5 BTN_ONOFF ON/OFF button
IO9 BOOT BOOT button (the chip's built-in boot pin)
IO10 LED_DATA_3V3 LED data out
IO18 / IO19 USB_DN_MCU / USB_DP_MCU (through R15 / R14) Built-in USB (programming, WLED install)
IO20 (RX) / IO21 (TX) TP9 / TP10 (TX through R16) Serial debug pads
IO3, IO4, IO6, IO7 X (not used) Spare
GND pins (22 pads incl. the centre pad) GND Ground

The module's 14 "NC" pads are hidden in the symbol; they must not be connected.

2. 3.3 V decoupling

C9 (10 µF) and C10 (100 nF) sit right next to the module's 3V3 pin, as in Espressif's reference design.

3. Enable delay and RESET

  • R7 (10 kΩ) + C11 (1 µF): the chip starts only after 3.3 V is steady (Espressif's value).
  • SW1 RESET pulls EN low to restart the chip. Silkscreen label: RESET.

4. BOOT, ON/OFF buttons and boot pins

  • SW2 BOOT (GPIO9) + R8 pull-up: hold BOOT while pressing RESET to load new software.
  • SW3 ON/OFF (GPIO5) + R11 pull-up: WLED button, short press = display on/off.
  • R9 / R10: pull-ups on GPIO8 / GPIO2.
  • All three buttons: TS-1187A-style 5.1 mm tactile switch footprint, labels RESET, BOOT, ON/OFF next to each (added in layout).

5. USB data line resistors (new)

The USB data wires run: USB-C socket -> USBLC6 protection chip -> R14 / R15 -> ESP32.

Part Value What it does
R14 (D+), R15 (D-) 22 Ω Small series resistors. They slightly soften the fast USB signal edges, which reduces ringing and radio noise. Espressif's hardware design guidelines recommend reserving them near the chip, with an initial value of 22 or 33 Ω. 22 Ω is the gentler choice for full-speed USB.
C13, C14 not fitted (DNP) Spare spots for small capacitors to ground. Espressif says they can start unpopulated. Only used if USB ever proves unreliable or noisy.

If USB works in the prototype (it should), nothing here needs to change. If it does not, these parts can be changed (for example to 33 Ω, or 0 Ω) without a new board design.

6. Serial debug pads (new)

Part What it is
TP9 IO20_RX ESP32 serial receive (GPIO20 / U0RXD).
TP10 IO21_TX ESP32 serial transmit (GPIO21 / U0TXD).
R16 499 Ω Series resistor on the transmit line (Espressif recommends 499 Ω here to suppress harmonics).

How to use them: connect a 3.3 V USB-serial adapter: adapter TX -> TP9, adapter RX -> TP10, adapter GND -> a GND pad. You can then see the ESP32's start-up messages, or load software with the BOOT button, even if USB is not working. Never connect 5 V here. At layout, a GND pad will be placed next to TP9/TP10.

Page 4: LED signal driver

Part Value What it does
U5 74AHCT1G125 (C52140417) Level shifter. Powered from +5V, so its output is a clean 5 V signal. Pin 1 (enable) tied to GND = always on.
R12 10 kΩ Pull-down: keeps the LEDs dark while the ESP32 starts (no random flashes).
R13 33 Ω Small series resistor that damps ringing on the LED data line (explained below).
C12 100 nF Decoupling for U5.
TP6 LED_DIN Scope the LED data timing here.

About R13 (33 Ω) in simple words

  • Where: between the level shifter's output (U5 pin 4) and the first LED's data input (LED_DIN, LED1 pin 4). Test pad TP6 is on the LED side.
  • What it does: the level shifter switches its output very fast. On a copper track, a very fast edge can "bounce" (ring) a little, like an echo, and briefly overshoot the voltage. A small resistor right at the driver acts like a shock absorber: it softens the bounce so the first LED sees a clean signal, and it limits the current if the data line is ever shorted.
  • Why 33 Ω: it is big enough to damp the bounce (the driver's own resistance is only tens of ohms, so a similar amount added in series matches the track), and small enough not to slow the signal. The LED data is 800 kHz with pulses of 400-800 ns; 33 Ω with the LED's few picofarads of input delays the edges by far less than 1 ns, so the timing is unchanged. Values from 22 to 100 Ω are common; 33 Ω is a typical middle choice for a short on-board track.
  • If needed: it can be changed to 0 Ω (no damping) or a larger value without a redesign.

Page 5: The 107 LEDs

  • One row per letter: R (LED1-18), I (19-29), T (30-40), H (41-57), E (58-75), S (76-90), H (91-107).
  • One data chain: each LED's data out (DOUT) feeds the next LED's data in (DIN). Rows link with names CHAIN_18, CHAIN_29, and so on. LED107's DOUT is not connected. The physical path of the chain inside each letter is chosen at the layout step. WLED will then get an "LED map" so it knows where each LED sits.
  • Every LED connects to +5V and GND.
  • C101-C207: one 100 nF capacitor per LED (C101 next to LED1 ... C207 next to LED107).
  • Bulk capacitors (220 µF 16 V, C72496): C301 (start, fitted), C302 (one-third, DNP), C303 (two-thirds, DNP), C304 (far end, fitted). KiCad marks DNP parts with a red cross. A "+" mark will be printed next to each footprint.
  • The LED part is PROVISIONAL (see below).

LED footprint comparison (XL-5050RGBC-2812B vs WS2812B-B/T)

From the two datasheets' drawings (my reading of the drawings; tolerance ±0.05-0.25 mm):

XL-5050RGBC-2812B WS2812B-B/T
Body 5.0 x 5.0 mm 5.0 x 5.4 mm
Pin order 1 VDD, 2 DO, 3 GND, 4 DI 1 VDD, 2 DOUT, 3 VSS, 4 DIN (same)
Part terminals (centres) ±2.2 mm across, ±1.6 mm down, 1.0 x 1.0 mm ±2.25 mm across, ±1.65 mm down, 0.9 x 0.9 mm
Recommended PCB pads 1.3 x 1.3 mm, centres ±2.2 x ±1.55 mm 1.5 x 0.9 mm, centres ±2.45 x ±1.65 mm (same as KiCad's standard footprint)

Findings:

  • The two recommended pad patterns are different. KiCad's standard WS2812B footprint covers the XL part's terminals across, but its pads are 0.1 mm short of the XL terminal's inner edge vertically.
  • A "superset" footprint that contains both recommended patterns looks possible on paper: pads about 1.65 x 1.3 mm, covering x = 1.55-3.2 mm and y = 0.9-2.2 mm from the centre (gaps: 3.1 mm across, 1.8 mm between rows).
  • Not yet confirmed as safe: larger-than-recommended pads can let a part float or rotate during soldering. This must be checked when the footprint is drawn at the layout step, and with JLCPCB's assembly review.
  • Update (layout step 1): the superset idea was dropped. The LED footprint now follows the XL datasheet pattern only (rithesh_fp:LED_XL-5050RGBC-2812B); see pcb-layout-notes.md. The XL LED stays the provisional part.

Electrical Rules Check (ERC)

  • Result: 0 errors, 0 warnings, 0 exclusions (KiCad 7.0.11, all 5 sheets), re-run on revision 2 after the USB resistors and debug pads were added. Report: erc-report.rpt.
  • Ignored test: only KiCad's default "SPICE model issue" (for circuit simulation, which this project does not use).
  • Problems ERC found and I fixed (not hidden):
    1. About 1,400 "off grid" warnings: parts were placed on round millimetre positions instead of KiCad's 1.27 mm grid. Fixed by snapping everything to the grid.
    2. "Pins with no connection type are connected": in my ESP32 symbol, the 14 hidden NC pins sat on one spot. Fixed by giving each its own position.
    3. One more "off grid" warning from step 2 (wrong spacing). Fixed.
  • Extra check (mine): tools/check_netlist.py reads KiCad's exported netlist and confirms every intended connection (power rails, USB, CC, eFuse, ESP32 pins, buttons, level shifter) and that the LED chain runs unbroken from LED1 to LED107. It passes. It was also tested on a deliberately broken netlist and correctly reported the break.
  • What ERC cannot check: part values, footprints, voltages, timing, heat, or whether the design meets the requirements. That is what this review and the prototype tests are for.

Pin audit (revision 2)

tools/check_pins.py compares the schematic with transcribed datasheet tables and checks the connection rules. Results:

Check Result Source
ESP32-C3-MINI-1 symbol: all 53 pins ✅ match Espressif datasheet v2.2, Table 3-1
TPS259531 symbol: 8 pins + exposed pad ✅ match TI TPS2595 datasheet, Pin Functions (DSG)
TLV76733 symbol: 6 pins + thermal pad ✅ match (fixed-output pinout) TI TLV767 datasheet, Figure 5-2 (DRV fixed)
XL-5050RGBC-2812B symbol: 4 pins ✅ match XINGLIGHT datasheet, pin table
USBLC6-2SC6 (KiCad library symbol) ✅ 1/6 = I/O1, 3/4 = I/O2, 5 = VBUS, 2 = GND ST datasheet (SOT23-6L)
74AHCT1G125 (KiCad library symbol) ✅ 1 OE, 2 A, 3 GND, 4 Y, 5 VCC Nexperia datasheet, Table 3 (SOT753)
Symbol pins = footprint pads ✅ for every part with a library footprint KiCad footprint files
All power and ground pins connected ✅ incl. all 22 ESP32 GND pads, both eFuse IN pins, both LDO GND pins netlist
Exposed / thermal pads ✅ eFuse pad 9, LDO pad 7, ESP32 EPAD (pin 49) all on GND. TI: "must be connected to GND" (eFuse), "connect to ground" (LDO) datasheets
USB-C connector pins ✅ VBUS A4/A9/B4/B9, GND A1/A12/B1/B12, shield S1 (4 shell tabs), CC1 A5, CC2 B5, D+ A6/B6, D- A7/B7; SBU A8/B8 unused USB-C 16-pin receptacle
USB protection chip on D+/D- ✅ I/O1 (pins 1, 6) on D+, I/O2 (pins 3, 4) on D-, VBUS pin to VBUS, GND to GND; D+ reaches ESP32 IO19 and D- reaches IO18 ST / Espressif
Surge diode direction ✅ pin 1 = cathode (bar in the symbol) to VBUS; D_SMA footprint pad 1 is on the marked (band) side KiCad symbol + footprint files
Unused pins ✅ ESP32 IO3/IO4/IO6/IO7 and 14 NC pads, USB-C SBU1/SBU2, LED107 data out: all intentionally unconnected (X) netlist

The checker was also tested on deliberately wrong inputs (a wrong datasheet pin and a disconnected thermal pad) and reported both, so a clean result is meaningful.

Package size check: the eFuse (TI DSG0008A) and regulator (TI DRV0006A) exposed pads are 0.9 mm and 1.0 mm wide in TI's drawings, matching the chosen WSON footprints (EP 0.9 x 1.6 mm and 1.0 x 1.6 mm). Full land-pattern check at layout.

Things still to confirm or test

Before or during PCB layout (paper checks):

  1. LED footprint: done in layout step 1 (XL pattern only; see pcb-layout-notes.md).
  2. ESP32-C3-MINI-1 footprint: done in layout step 1 (Espressif's official footprint, checked against the datasheet).
  3. D1 orientation at assembly: the schematic and footprint agree (pin 1 = cathode = band side). Also check the diode orientation in JLCPCB's assembly preview before ordering.
  4. Button part: confirm a JLCPCB part that fits the TS-1187A footprint.
  5. Passive part numbers: pick JLCPCB parts (preferably "basic") for all resistors and capacitors, and re-check basic/extended status and prices on jlcpcb.com.
  6. Layout rules: wide 5 V and GND copper along the LED rail; antenna at the board edge with no copper underneath; C9/C10 next to the module; each 100 nF next to its LED; bulk capacitors at start, one-third, two-thirds and far end.

Needs physical testing (from requirements.md):

  1. LED timing pre-check (before ordering the PCB): 5-10 XL LEDs on WLED through the same level shifter; correct colors, no flashes, about 400 ns "0" pulse on the scope.
  2. LED PWM synchronization and bulk capacitance (prototype): scope the 5 V rail and the current (TP8 ILM + USB-C meter); fit C302/C303 if needed.
  3. 5.7 V fault exposure: documented prototype risk, not tested.
  4. eFuse behaviour: FLT stays high, no current limiting or overheating in normal use.
  5. ESP32 stability, capacitor temperature, plug-in with two chargers: see the pass criteria in requirements.md.

Design choices made in this step (please review)

  • R13 33 Ω series resistor on the LED data line (now recorded in requirements.md).
  • R14/R15 22 Ω on USB D+/D-, and C13/C14 not fitted (revision 2, per Espressif).
  • TP9/TP10 serial debug pads with R16 499 Ω on TX (revision 2, per Espressif).
  • Footprint sizes: 0402 resistors and most capacitors, 0603 for 4.7 µF, 0805 for 10 µF, 6.3 x 7.7 mm for the 220 µF capacitors.

How the files were made and checked

The schematic is generated by a script so the 107-LED chain has no copy mistakes:

cd rithesh-led-display/hardware
python3 tools/generate_schematic.py              # writes the .kicad_sch files
kicad-cli sch export netlist --format kicadxml -o /tmp/net.xml rithesh-led-display.kicad_sch
python3 tools/check_netlist.py /tmp/net.xml      # connection check
python3 tools/check_pins.py /tmp/net.xml         # datasheet pin audit + connection rules
kicad-cli sch export pdf -o schematic.pdf rithesh-led-display.kicad_sch

ERC was run in KiCad 7's schematic editor (KiCad 7's command-line tool has no ERC command). You can edit the schematic directly in KiCad later; after that, edit it in KiCad rather than re-running the generator, or the generator would overwrite your changes.