TMUX6208PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	A0	input	Logic control input (address bit 0) with internal 4 MΩ pull-down resistor. Selects which Sx source pin is connected to D per the truth table in Section 8.5.
2	EN	input	Active-high logic enable with internal 4 MΩ pull-down resistor. When low all switches are off; when high the A0/A1/A2 address selects the active Sx-to-D switch.
3	VSS	power_in	Negative power supply (most negative rail). Tie to GND for single-supply operation, or to a negative rail for dual/asymmetric supplies. Decouple with 0.1 µF to 10 µF to GND.
4	S1	bidirectional	Source pin 1 of the 8:1 analog switch. Signal-path input or output; voltage bounded by VSS to VDD, current per IDC table (e.g. 300 mA at 25 °C, ±15 V dual supply, TSSOP).
5	S2	bidirectional	Source pin 2 of the 8:1 analog switch. Signal-path input or output; voltage bounded by VSS to VDD.
6	S3	bidirectional	Source pin 3 of the 8:1 analog switch. Signal-path input or output; voltage bounded by VSS to VDD.
7	S4	bidirectional	Source pin 4 of the 8:1 analog switch. Signal-path input or output; voltage bounded by VSS to VDD.
8	D	bidirectional	Common drain (multiplexer common) pin. Connects to whichever Sx is selected by A0/A1/A2 when EN is high; can be an input or output. Voltage bounded by VSS to VDD.
9	S8	bidirectional	Source pin 8 of the 8:1 analog switch. Signal-path input or output; voltage bounded by VSS to VDD.
10	S7	bidirectional	Source pin 7 of the 8:1 analog switch. Signal-path input or output; voltage bounded by VSS to VDD.
11	S6	bidirectional	Source pin 6 of the 8:1 analog switch. Signal-path input or output; voltage bounded by VSS to VDD.
12	S5	bidirectional	Source pin 5 of the 8:1 analog switch. Signal-path input or output; voltage bounded by VSS to VDD.
13	VDD	power_in	Positive power supply (most positive rail). Recommended 4.5 V to 36 V (VDD − VSS ≤ 36 V). Decouple with 0.1 µF to 10 µF between VDD and GND.
14	GND	power_in	Ground (0 V) reference for the logic and supply-decoupling network.
15	A2	input	Logic control input (address bit 2) with internal 4 MΩ pull-down resistor. Selects which Sx source pin is connected to D per the truth table in Section 8.5.
16	A1	input	Logic control input (address bit 1) with internal 4 MΩ pull-down resistor. Selects which Sx source pin is connected to D per the truth table in Section 8.5.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-16
Category	Comm/UART
Pins	16

Ordering variants

Same part, different packaging or reel option.

TMUX6208PWR
TMUX6208PWRRUM
TMUX6208PWRRUMR

CAD (KiCad official)

Symbol: TMUX6208PWR
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (49 pp, sha256 dbb3e771e4dd4423, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF