STM8S001J3M3TR from STMicroelectronics, in a SOIC-8-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PD6/AIN6/UART1_RX/PA1/OSCIN	bidirectional	Bonded pin carrying Port D6 (default GPIO, high-sink, floating after reset) and Port A1. Alternate functions: analog input AIN6, UART1 data receive (UART1_RX) on PD6, and external HSE clock input (OSCIN) on PA1. When used as PA1 in halt/active-halt, the pin is automatically configured as weak pull-up input and cannot wake the device.
2	VSS/VSSA	power_in	Digital and analog ground reference (0 V) for the device.
3	VCAP	passive	Internal 1.8 V regulator output. Requires an external stabilization capacitor (typ. 1 µF) to VSS; do not connect to any external load.
4	VDD/VDDA	power_in	Main digital and analog supply voltage input, 2.95 V to 5.5 V operating range. Decoupling capacitors to VSS are required close to the pin.
5	PA3/TIM2_CH3[SPI_NSS][UART1_TX]/PB5/I2C_SDA[TIM1_BKIN]	bidirectional	Bonded pin carrying Port A3 (high-sink GPIO, default alt-function TIM2 channel 3) and Port B5 (true open-drain GPIO, default alt-function I2C SDA data line). Remap options add SPI master/slave select (SPI_NSS) or UART1_TX on PA3, and TIM1 break input (TIM1_BKIN) on PB5. VIN max on this pin is limited by the standard GPIO PA3.
6	PB4/I2C_SCL/[ADC_ETR]	bidirectional	Port B4 general-purpose I/O, true open-drain output only. Default alternate function is I2C clock (SCL); remap option [AFR4] makes it the ADC external trigger (ADC_ETR).
7	PC3/TIM1_CH3[TLI][TIM1_CH1N]/PC4/CLK_CCO/TIM1_CH4[AIN2][TIM1_CH2N]/PC5/SPI_SCK[TIM2_CH1]	bidirectional	Bonded pin carrying Port C3, Port C4 and Port C5, all high-sink GPIOs. Default alternate functions: TIM1 channel 3 (PC3), configurable clock output/TIM1 channel 4 (PC4) and SPI clock SPI_SCK (PC5). Remap options include Top-Level Interrupt TLI or TIM1_CH1N on PC3; analog input AIN2 or TIM1_CH2N on PC4; TIM2_CH1 on PC5.
8	PC6/SPI_MOSI[TIM1_CH1]/PD1/SWIM/PD3/AIN4/TIM2_CH2/ADC_ETR/PD5/AIN5/UART1_TX	bidirectional	Bonded pin carrying Port C6, Port D1, Port D3 and Port D5, all high-sink GPIOs. Default alternate functions: SPI master data out (SPI_MOSI) on PC6; SWIM single-wire debug interface on PD1 (default weak pull-up during reset, influences all other GPIOs on this pin); TIM2 channel 2 / analog input AIN4 / ADC external trigger on PD3; UART1_TX / analog input AIN5 on PD5. Remap option adds TIM1_CH1 on PC6.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	SOIC-8-150mil
Category	MCU
Pins	8

Ordering variants

Same part, different packaging or reel option.

STM8S001J3M3TR

CAD (KiCad official)

Symbol: STM8S001J3M3TR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8-150mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`stm8s001j3m3tr.step`	122 KB	You want the bare part, or you mark your own boards.
`stm8s001j3m3tr-etched.step`	3.1 MB	You want the part with `STM8S001J3M3TR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 752 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (84 pp, sha256 969b98be0edfc600, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF