component
MSP430G2352IPW14R
Public Unreviewedby Ray
Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads when scrolled away or the tab is hidden.
PCB Footprint
Open full view ↗Loads on click. Unloads when scrolled away or the tab is hidden.
Datasheet
Open in new tab ↗Loads on click. Unloads when scrolled away or the tab is hidden.
README
markdownMSP430G2352IPW14R
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-14
MSP430G2352IPW14R from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage. Operating range 1.8 V to 3.6 V. Bypass locally to DVSS with a decoupling capacitor (typ. 100 nF). |
| 2 | P1.0/TA0CLK/ACLK/A0/CA0 | bidirectional | General-purpose digital I/O pin P1.0 with muxed alternate functions: Timer0_A TACLK external clock input, ACLK signal output, ADC10 analog input A0, and Comparator_A+ input CA0. |
| 3 | P1.1/TA0.0/A1/CA1 | bidirectional | General-purpose digital I/O pin P1.1 with muxed alternate functions: Timer0_A CCI0A capture input / Out0 compare output, ADC10 analog input A1, and Comparator_A+ input CA1. |
| 4 | P1.2/TA0.1/A2/CA2 | bidirectional | General-purpose digital I/O pin P1.2 with muxed alternate functions: Timer0_A CCI1A capture input / Out1 compare output, ADC10 analog input A2, and Comparator_A+ input CA2. |
| 5 | P1.3/ADC10CLK/CAOUT/A3/VREF-/VEREF-/CA3 | bidirectional | General-purpose digital I/O pin P1.3 with muxed alternate functions: ADC10 conversion clock output, Comparator_A+ output CAOUT, ADC10 analog input A3, ADC10 negative reference input (VREF-/VEREF-), and Comparator_A+ input CA3. |
| 6 | P1.4/SMCLK/TA0.2/A4/VREF+/VEREF+/CA4/TCK | bidirectional | General-purpose digital I/O pin P1.4 with muxed alternate functions: SMCLK signal output, Timer0_A CCI2A capture / Out2 compare, ADC10 analog input A4, ADC10 positive reference input (VREF+/VEREF+), Comparator_A+ input CA4, and JTAG test clock (TCK) for 4-wire programming/test. |
| 7 | P1.5/TA0.0/SCLK/A5/CA5/TMS | bidirectional | General-purpose digital I/O pin P1.5 with muxed alternate functions: Timer0_A Out0 compare output, USI clock (SCLK) - clock input in I2C mode, clock in/out in SPI mode, ADC10 analog input A5, Comparator_A+ input CA5, and JTAG test mode select (TMS). |
| 8 | P1.6/TA0.1/SDO/SCL/A6/CA6/TDI/TCLK | bidirectional | General-purpose digital I/O pin P1.6 with muxed alternate functions: Timer0_A Out1 compare output, USI SDO (SPI data out) or SCL (I2C clock), ADC10 analog input A6, Comparator_A+ input CA6, and JTAG TDI / TCLK for programming and test. |
| 9 | P1.7/CAOUT/SDI/SDA/A7/CA7/TDO/TDI | bidirectional | General-purpose digital I/O pin P1.7 with muxed alternate functions: Comparator_A+ output CAOUT, USI SDI (SPI data in) or SDA (I2C data), ADC10 analog input A7, Comparator_A+ input CA7, and JTAG TDO/TDI (direction selected by JTAG instruction). |
| 10 | RST/NMI/SBWTDIO | bidirectional | Active-low reset input (RST), configurable non-maskable interrupt input (NMI), and Spy-Bi-Wire test data I/O (SBWTDIO) during programming/debug. Requires external pull-up when Spy-Bi-Wire is used (typ. 47 kΩ) with a small filter cap. |
| 11 | TEST/SBWTCK | input | Selects JTAG test mode for Port 1 pins (TEST) and provides Spy-Bi-Wire test clock input (SBWTCK) during programming/test. The device security fuse is connected to this pin. |
| 12 | XOUT/P2.7 | bidirectional | Output terminal of the low-frequency crystal oscillator (typically 32.768 kHz) or general-purpose digital I/O P2.7. After reset the oscillator output driver is connected to this pad; excess current can flow if driven as an input until P2SEL.7 is cleared. |
| 13 | XIN/P2.6/TA0.1 | bidirectional | Input terminal of the low-frequency crystal oscillator (typ. 32.768 kHz) or external digital clock source, or general-purpose digital I/O P2.6, or Timer0_A Out1 compare output. |
| 14 | DVSS | power_in | Digital ground reference. Tie to system ground plane; place decoupling capacitors between DVCC and DVSS with short return paths. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
MSP430G2352IPW14RMSP430G2352IPW14RIPW20MSP430G2352IPW14RIN20MSP430G2352IPW14RIRSA16
CAD (KiCad official)
- Symbol:
MSP430G2352IPW14R - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (None pp, sha256
4a95b55c77e49dbf, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).