LMR16010PDDAR from Texas Instruments, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	BOOT	passive	Bootstrap capacitor connection for high-side MOSFET driver. Connect a high quality 0.1 µF capacitor from BOOT to SW. Absolute max BOOT-to-SW = 6.5 V; BOOT-to-GND up to 71 V.
2	VIN	power_in	Input supply pin, 4.3 V to 60 V operating range (65 V absolute max). Connect to power supply and bypass capacitor CIN; keep CIN return to GND short.
3	EN	input	Precision enable input with internal pull-up current source. Pull below 1.2 V (typ) to disable; float or tie to VIN to enable. Can be used with a two-resistor divider to program input UVLO. Threshold typ 1.20 V, absolute max 65 V.
4	RT/SYNC	bidirectional	Resistor timing or external clock input. Tie a resistor to GND to program switching frequency (200 kHz-2.5 MHz). Driving above the PLL upper threshold turns the pin into a high-impedance sync clock input (250 kHz-2.3 MHz). Absolute max 3.6 V.
5	FB	input	Feedback input pin. Connect to the external resistor divider from VOUT to set the output voltage; internal reference VFB = 0.750 V. Do not short to ground during operation. Absolute max 7 V.
6	PGOOD	output	Power-Good open-drain output flag. Requires a 10 kΩ to 100 kΩ pull-up to a logic rail or DC voltage no higher than 7 V. Asserts when FB is within ~94%/107% of reference.
7	GND	power_in	System ground pin. Return for input bypass and internal analog/power ground.
8	SW	power_out	Switching output of the regulator, internally connected to the high-side power MOSFET (155 mΩ typ). Connect to the power inductor; also serves as the low-side reference for the BOOT capacitor. Operating range -1 V to 60 V (absolute max -3 V to 65 V).
9	Thermal Pad	power_in	Exposed PowerPAD on the underside of the HSOIC package - the major heat dissipation path of the die. Must be soldered to the PCB ground plane for thermal performance and electrically tied to GND.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SO-8
Category	PMIC
Pins	9

Ordering variants

Same part, different packaging or reel option.

LMR16010PDDAR

CAD (KiCad official)

Symbol: LMR16010PDDAR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SO-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`lmr16010pddar.step`	123 KB	You want the bare part, or you mark your own boards.
`lmr16010pddar-etched.step`	2.4 MB	You want the part with `LMR16010PDDAR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 615 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (34 pp, sha256 d8c3ccade909e351, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF