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biss0001m
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HGSEMI Human Body Sensing Sensor, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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markdownBISS0001M
HGSEMI · Human Body Sensing Sensor · SOP-16
BISS0001M from HGSEMI, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Trigger mode control input. A=1 enables retriggerable mode (Vs may re-trigger Vo during Tx, extending it); A=0 selects non-retriggerable mode (Vs is ignored during Tx). VIH >= 3.5 V, VIL <= 1.5 V at VDD=5V. |
| 2 | VO | output | Control signal output. Driven high on the rising edge of the internal Vs trigger signal (valid trigger) and held high for the delay time Tx; otherwise low. VOH >= 4 V, VOL <= 0.4 V at VDD=5V. |
| 3 | RR1 | passive | Output-delay-time (Tx) adjust pin. External resistor R1 to RC1 sets Tx together with C1 per Tx ≈ 67025·R1·C1 (seconds, with R in Ω and C in F). |
| 4 | RC1 | passive | Output-delay-time (Tx) adjust pin. External capacitor C1 to VSS combined with R1 on RR1 sets Tx ≈ 67025·R1·C1. |
| 5 | RC2 | passive | Trigger-blocking-time (Ti) adjust pin. External capacitor C2 to VSS with R2 on RR2 sets Ti ≈ 60·R2·C2 (seconds, with R in Ω and C in F). During Ti any change of Vs is ignored. |
| 6 | RR2 | passive | Trigger-blocking-time (Ti) adjust pin. External resistor R2 to RC2 sets Ti together with C2 per Ti ≈ 60·R2·C2. |
| 7 | VSS | power_in | Negative supply / ground reference. Typically 0 V. |
| 8 | VRF/RESET | input | Reference voltage and reset input. Normally tied to VDD for normal operation; pulling to 0 resets the internal timers. |
| 9 | VC | input | Trigger-inhibit input. Vc < VR (≈0.2·VDD) inhibits triggering; Vc > VR enables triggering. Often driven from an LDR (e.g. CdS RGS) so ambient light disables the switch. VIH >= 1.1 V, VIL <= 0.9 V at VDD=5V. |
| 10 | IB | passive | Op-amp bias-current setting pin. Connect through RB (~1 MΩ) to VSS to program the internal op-amps' bias current. |
| 11 | VDD | power_in | Positive supply. Operating range 3.0-5.0 V (absolute max +6 V). Typical IDD 50 µA at 3 V, 100 µA at 5 V (no-load). |
| 12 | 2OUT | output | Second-stage op-amp (OP2) output. Feeds the internal bi-directional amplitude discriminator (window comparator COP1/COP2, thresholds VH ≈ 0.7·VDD, VL ≈ 0.3·VDD). |
| 13 | 2IN- | input | Second-stage op-amp (OP2) inverting input. AC-coupled from OP2's non-inverting input (biased to VM ≈ 0.5·VDD internally); external RC network sets the second-stage gain. |
| 14 | 1IN+ | input | First-stage op-amp (OP1) non-inverting input. High-input-impedance signal input for the PIR sensor front-end preamplifier. |
| 15 | 1IN- | input | First-stage op-amp (OP1) inverting input. External feedback network from 1OUT sets the first-stage gain. |
| 16 | 1OUT | output | First-stage op-amp (OP1) output. AC-coupled through an external capacitor to the OP2 inverting input (2IN-). Open-loop gain typ. 60 dB, output swing 0.75-4.25 V at VDD=5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-16 |
| Category | Sensor |
| Pins | 16 |
Ordering variants
BISS0001MM/TRBISS0001MNBISS0001MMT/TRBISS0001MLQ/TR
CAD (KiCad official)
- Symbol:
BISS0001M - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (None pp, sha256
870d88a3291aa130, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).