Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

TPS62097QWRGTRQ1

Texas Instruments · DC-DC Converters · VQFN-16-EP(3x3)

TPS62097QWRGTRQ1 from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOS input Output voltage sense pin that must be connected directly to the output capacitor.
2 FB input Feedback pin: a resistor divider sets the output voltage on the adjustable version, it is recommended to connect to AGND on fixed-output versions, and an internal 400 kΩ to AGND lets it be left floating; absolute maximum voltage is 3.0 V.
3 MODE input Mode selection pin: connect to AGND for Power Save Mode with automatic PWM/Power Save transition, or connect to an external resistor or leave floating for forced PWM only.
4 AGND power_in Analog ground pin, which is also the connection for the exposed thermal pad.
5 PGND power_in Power ground pin.
6 PGND power_in Power ground pin.
7 PVIN power_in Power input supply pin, operating from 2.5 V to 6.0 V input voltage range.
8 PVIN power_in Power input supply pin, operating from 2.5 V to 6.0 V input voltage range.
9 AVIN power_in Analog input supply pin that must be connected to the PVIN pin together.
10 SS/TR input Soft-start and voltage-tracking pin; a capacitor sets the soft-start time, and leaving it floating sets the minimum startup time.
11 PG output Power-good open-drain output whose pull-up resistor must not be connected to any voltage higher than 6 V; leave floating if unused.
12 EN input Enable pin that must be pulled high to enable the device and pulled low to disable it, with an internal pull-down of typically 375 kΩ when disabled.
13 SW power_out Switch pin connected to the internal MOSFET switches; the external inductor connects between this terminal and the output capacitor.
14 SW power_out Switch pin connected to the internal MOSFET switches; the external inductor connects between this terminal and the output capacitor.
15 SW power_out Switch pin connected to the internal MOSFET switches; the external inductor connects between this terminal and the output capacitor.
16 SW power_out Switch pin connected to the internal MOSFET switches; the external inductor connects between this terminal and the output capacitor.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-16-EP(3x3)
Category Power Supply Chip
Pins 17

CAD (KiCad official)

  • Symbol: TPS62097QWRGTRQ1
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps62097qwrgtrq1-etched.step / tps62097qwrgtrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62097qwrgtrq1.step / tps62097qwrgtrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 2c1171bf86632370, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF