EA2208LT6R from Everanalog IC design, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SWITCH	output	Internal NMOS power switch drain output. Connect to the boost inductor and the anode of the output Schottky rectifier. Abs-max voltage +22V; internal current limit 2.5A (adjustable via OC); RDS(on) ~80mΩ typ.
2	GND	power_in	Device ground. Should be tied to a large ground plane and connected close to the input/output capacitor return paths to minimize noise.
3	FBK	input	Feedback input to the internal error amplifier; regulated to VREF = 0.6V (typ, 0.588-0.612V). Set output voltage with a resistor divider from VOUT to FBK to GND: VOUT = 0.6 x (R1/R2) + 0.6 V. Abs-max +6V; input bias ~-10nA.
4	RUN	input	Enable / on-off control input. Drive high (>=1.5V) to enable the converter, low (<=0.5V) to shut down (ISD ~0.1uA). Must not be left floating. Abs-max +18V.
5	PWR	power_in	Device power input supply, 2.2V to 16V (abs-max +18V). Decouple with a 22uF X5R/X7R MLCC placed as close to the pin as possible to avoid noise interference.
6	OC	input	Adjustable peak-switch current-limit programming pin. Connect a 19kΩ-96kΩ resistor (R3) from OC to GND to set IOC from 2.5A down to 0.5A (IOC = 48000 / R3). May be left floating, in which case the internal 2.5A current limit is used. Keep the trace short.

Key specifications

Parameter	Value
Manufacturer	Everanalog IC design
Package	SOT-23-6
Category	PMIC
Pins	6

Ordering variants

Same part, different packaging or reel option.

EA2208LT6R

CAD (KiCad official)

Symbol: EA2208LT6R
Footprint: Package_TO_SOT_SMD:SOT-23-6
3D model: SOT-23-6 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`ea2208lt6r.step`	97 KB	You want the bare part, or you mark your own boards.
`ea2208lt6r-etched.step`	2.0 MB	You want the part with `EA2208LT6R` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 498 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Everanalog IC design datasheet (8 pp, sha256 ccd9c1e971e6ab43, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF