TPL720F33-5TR
Public Unreviewedby Ray
3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownTPL720F33-5TR
3PEAK · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPL720F33-5TR from 3PEAK, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input voltage pin. Recommended operating range 2.4 V to 6 V (abs max 6.5 V). Bypass IN to GND with a 1 μF or greater ceramic capacitor placed close to the pin. |
| 2 | GND | power_in | Ground reference pin. Connect directly to the PCB ground plane to minimize impedance and improve thermal performance. |
| 3 | EN | input | Regulator enable input. Drive EN high (VIH ≥ 1.2 V, up to VIN) to turn the regulator on; drive low (VIL ≤ 0.4 V) to shut it down (ISHDN ≈ 0.1 μA). For automatic startup, tie EN to IN. EN pin leakage is ≤ 20 nA. |
| 4 | NC | unconnected | No internal connection. May be left floating or tied to GND for board layout convenience. |
| 5 | OUT | power_out | Regulated 3.3 V output pin (±1% at TJ = 25 °C, ±3% over −40 °C to +125 °C). Supplies up to 400 mA with 350 mV dropout at full load. Bypass OUT to GND with a 2.2 μF (up to 10 μF) low-ESR ceramic capacitor. Actively discharged through ~190 Ω when disabled. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | SOT-23-5 |
| Category | PMIC |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
TPL720F33-5TRTPL720F33-5TR-3TRTPL720F33-5TR-89TRTPL720F33-5TR-FR
CAD (KiCad official)
- Symbol:
TPL720F33-5TR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tpl720f33-5tr.step |
85 KB | You want the bare part, or you mark your own boards. |
tpl720f33-5tr-etched.step |
2.1 MB | You want the part with TPL720F33-5TR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 530 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 3PEAK datasheet (18 pp, sha256
c65dff82814441be, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).