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EFM8UB20F64G-B-QFP32
Public Made by Adomby adom
SILICON LABS Pre-ordered MCUs, QFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownEFM8UB20F64G-B-QFP32
SILICON LABS · Pre-ordered MCUs · QFP-32(7x7)
EFM8UB20F64G-B-QFP32 from SILICON LABS, in a QFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P0.1 | bidirectional | Crossbar-capable multifunction I/O with INT0.1/INT1.1 external interrupt, ADC0P.18/ADC0N.18 and CMP0N.4 analog functions. |
| 2 | P0.0 | bidirectional | Crossbar-capable multifunction I/O with INT0.0/INT1.0 external interrupt, ADC0P.17/ADC0N.17 and CMP0P.4 analog functions. |
| 3 | GND | power_in | Ground. |
| 4 | D+ | bidirectional | USB Data Positive. |
| 5 | D- | bidirectional | USB Data Negative. |
| 6 | VDD | power_in | Supply power input / 5V regulator output. |
| 7 | VREGIN | power_in | 5V regulator input. |
| 8 | VBUS | power_in | USB VBUS sense input. |
| 9 | RSTb / C2CK | bidirectional | Active-low reset and C2 debug clock. |
| 10 | P3.0 / C2D | bidirectional | Crossbar-capable multifunction I/O shared with C2 debug data, with ADC0P.16/ADC0N.16 analog functions. |
| 11 | P2.7 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.15/ADC0N.15 analog functions. |
| 12 | P2.6 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.14/ADC0N.14 analog functions. |
| 13 | P2.5 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.13/ADC0N.13 and CMP0N.3 analog functions. |
| 14 | P2.4 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.12/ADC0N.12 and CMP0P.3 analog functions. |
| 15 | P2.3 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.11/ADC0N.11 and CMP1N.2 analog functions. |
| 16 | P2.2 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.10/ADC0N.10 and CMP1P.2 analog functions. |
| 17 | P2.1 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.9/ADC0N.9 and CMP0N.2 analog functions. |
| 18 | P2.0 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.8/ADC0N.8 and CMP0P.2 analog functions. |
| 19 | P1.7 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.7/ADC0N.7 and CMP1N.1 analog functions. |
| 20 | P1.6 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.6/ADC0N.6 and CMP1P.1 analog functions. |
| 21 | P1.5 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.5/ADC0N.5 and CMP0N.1 analog functions. |
| 22 | P1.4 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.4/ADC0N.4 and CMP0P.1 analog functions. |
| 23 | P1.3 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.3/ADC0N.3 and CMP1N.0 analog functions. |
| 24 | P1.2 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.2/ADC0N.2 and CMP1P.0 analog functions. |
| 25 | P1.1 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.1/ADC0N.1 and CMP0N.0 analog functions. |
| 26 | P1.0 | bidirectional | Crossbar-capable multifunction I/O with ADC0P.0/ADC0N.0 and CMP0P.0 analog functions. |
| 27 | P0.7 | bidirectional | Crossbar-capable multifunction I/O with INT0.7/INT1.7 external interrupt and VREF function. |
| 28 | P0.6 | bidirectional | Crossbar-capable multifunction I/O with CNVSTR and INT0.6/INT1.6 external interrupt. |
| 29 | P0.5 | bidirectional | Crossbar-capable multifunction I/O with UART0_RX, INT0.5/INT1.5, ADC0P.20/ADC0N.20 and CMP1N.4. |
| 30 | P0.4 | bidirectional | Crossbar-capable multifunction I/O with UART0_TX, INT0.4/INT1.4, ADC0P.19/ADC0N.19 and CMP1P.4. |
| 31 | P0.3 | bidirectional | Crossbar-capable multifunction I/O with EXTCLK and INT0.3/INT1.3 external interrupt. |
| 32 | P0.2 | bidirectional | Crossbar-capable multifunction I/O with INT0.2/INT1.2 external interrupt. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SILICON LABS |
| Package | QFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Supply Voltage on VDD | VDD | 2.72 | 3.3 | 3.6 | V | 12 | |
| Operating Supply Voltage on VREGIN | VREGIN | 2.7 | 5.25 | V | 12 | ||
| System Clock Frequency | fSYSCLK | 0 | 48 | MHz | 12 | ||
| Operating Ambient Temperature | TA | -40 | 85 | °C | 12 | ||
| Digital Core Supply Current, Normal Mode-Full speed with code executing from flash | IDD | 12 | 14 | mA | FSYSCLK = 48 MHz | 13 | |
| Digital Core Supply Current, Normal Mode-Full speed with code executing from flash | IDD | 7 | 8 | mA | FSYSCLK = 24 MHz | 13 | |
| Digital Core Supply Current, Idle Mode-Core halted with peripherals running | IDD | 6.5 | 8 | mA | FSYSCLK = 48 MHz | 13 | |
| Digital Core Supply Current, Idle Mode-Core halted with peripherals running | IDD | 3.5 | 5 | mA | FSYSCLK = 24 MHz | 13 | |
| ADC0 Supply Current | IADC | 750 | 1000 | μA | Operating at 500 ksps, VDD = 3.0 V | 13 | |
| Voltage Supply Monitor (VMON0) Supply Current | IVMON | 15 | 50 | μA | 13 | ||
| High Frequency Oscillator 0 (48 MHz) Oscillator Frequency | fHFOSC0 | 47.3 | 48 | 48.7 | MHz | Full Temperature and Supply Range | 15 |
| Low Frequency Oscillator (80 kHz) Oscillator Frequency | fLFOSC | 75 | 80 | 85 | kHz | Full Temperature and Supply Range | 15 |
| Crystal Frequency | fXTAL | 0.02 | 30 | MHz | 15 | ||
| External Input CMOS Clock Frequency (at EXTCLK pin) | fCMOS | 0 | 48 | MHz | 15 | ||
| ADC Throughput Rate | fS | 500 | ksps | 16 | |||
| ADC Tracking Time | tTRK | 300 | ns | 16 | |||
| ADC SAR Clock Frequency | fSAR | 8.33 | MHz | 16 | |||
| ADC Conversion Time | tCNV | 13 | Clocks | 10-Bit Conversion | 16 | ||
| ADC Voltage Reference Range | VREF | 1 | V | 16 | |||
| ADC Input Voltage Range | VIN | 0 | V | Single-Ended (AIN+ - GND) | 16 | ||
| ADC Integral Nonlinearity | INL | -1 | 0.5 | 1 | LSB | DC Performance, VREF = 2.4 V | 16 |
| ADC Differential Nonlinearity (Guaranteed Monotonic) | DNL | -1 | 0.5 | 1 | LSB | DC Performance, VREF = 2.4 V | 16 |
| ADC Offset Error | EOFF | -2 | 0 | 2 | LSB | DC Performance, VREF = 2.4 V | 16 |
| ADC Slope Error | EM | -0.5 | -0.2 | 0.5 | % | DC Performance, VREF = 2.4 V | 16 |
| ADC Signal-to-Noise | SNR | 55 | 58 | dB | 10 kHz Sine Wave Input, 1 dB below full scale, VREF = 2.4 V | 16 | |
| ADC Signal-to-Noise Plus Distortion | SNDR | 55 | 58 | dB | 10 kHz Sine Wave Input, 1 dB below full scale, VREF = 2.4 V | 16 | |
| On-chip Precision Reference Output Voltage | VREFP | 2.38 | 2.42 | 2.46 | V | T = 25 °C | 17 |
| On-chip Precision Reference Short-circuit current | ISCVREFP | 8 | mA | 17 | |||
| Thermal Resistance, QFP32 Packages | θJA | 80 | °C/W | 23 | |||
| Ambient Temperature Under Bias | TBIAS | -55 | 125 | °C | 24 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 24 | ||
| Voltage on VDD | VDD | 4.2 | V | 24 | |||
| Voltage on VREGIN | VREGIN | 5.8 | V | 24 | |||
| Voltage on I/O, RSTb, or VBUS pins | VIN | 5.8 | V | VDD > 2.2 V | 24 | ||
| Total Current Sunk into Supply Pin | IVDD | 500 | mA | 24 | |||
| Total Current Sourced out of Ground Pin | IGND | 500 | mA | 24 | |||
| Current Sourced or Sunk by any I/O Pin or RSTb | IIO | -100 | 100 | mA | 24 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body Components. | 43 |
CAD (KiCad official)
- Symbol:
EFM8UB20F64G-B-QFP32 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: QFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
efm8ub20f64g-b-qfp32-etched.step/efm8ub20f64g-b-qfp32-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);efm8ub20f64g-b-qfp32.step/efm8ub20f64g-b-qfp32.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SILICON LABS datasheet (57 pp, sha256
6022323e8bbca04e, retrieved 2026-11-13, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).