component
PIC16LF18323-I
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownPIC16LF18323-I
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TSSOP-14
PIC16LF18323-I from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply; PIC16LF18323 operates from 1.8V to 3.6V and requires a decoupling capacitor (0.1 µF recommended) to VSS. |
| 2 | RA5 | bidirectional | General purpose I/O RA5 shared with ANA5, T1CKI, CLCIN3, SOSCI/SOSCIN, OSC1 and CLKIN. |
| 3 | RA4 | bidirectional | General purpose I/O RA4 shared with ANA4, T1G, SOSCO, OSC2 and CLKOUT (FOSC/4 output). |
| 4 | RA3/MCLR/VPP | input | Input-only RA3 that serves as Master Clear (with internal weak pull-up) and VPP programming voltage input. |
| 5 | RC5 | bidirectional | General purpose I/O RC5 shared with ANC5, MDCIN2, CCP1 and RX. |
| 6 | RC4 | bidirectional | General purpose I/O RC4 shared with ANC4 and CLCIN1. |
| 7 | RC3 | bidirectional | General purpose I/O RC3 shared with ANC3, C1IN3-, C2IN3-, MDMIN, CCP2, CLCIN0 and SS1. |
| 8 | RC2 | bidirectional | General purpose I/O RC2 shared with ANC2, C1IN2-, C2IN2- and MDCIN1. |
| 9 | RC1 | bidirectional | General purpose I/O RC1 shared with ANC1, C1IN1-, C2IN1-, SDA1/SDI1 and CLCIN2. |
| 10 | RC0 | bidirectional | General purpose I/O RC0 shared with ANC0, C2IN0+, SCL1 (I2C clock) and SCK1 (SPI clock). |
| 11 | RA2 | bidirectional | General purpose I/O RA2 shared with ANA2, VREF-, DAC1REF-, T0CKI, CWG1IN and INT external interrupt. |
| 12 | RA1 | bidirectional | General purpose I/O RA1 shared with ANA1, VREF+, C1IN0-, C2IN0-, DAC1REF+ and ICSPCLK/ICDCLK (programming/debug clock). |
| 13 | RA0 | bidirectional | General purpose I/O RA0 shared with ANA0, C1IN0+, DAC1OUT and ICSPDAT/ICDDAT (programming/debug data). |
| 14 | VSS | power_in | Ground reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-14 |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | 1.8 | 3.6 | V | FOSC ≤ 16 MHz | 393 | |
| Supply voltage | VDD | 2.5 | 3.6 | V | FOSC > 16 MHz | 393 | |
| Operating ambient temperature (Industrial) | TA | -40 | 85 | °C | Industrial | 391 | |
| VDD on VDD pin | VDD | -0.3 | 4 | V | PIC16LF18313/18323, with respect to VSS | 390 | |
| Voltage on MCLR pin | -0.3 | 9 | V | with respect to VSS | 390 | ||
| Storage temperature | -65 | 150 | °C | 390 | |||
| Ambient temperature under bias | -40 | 125 | °C | 390 | |||
| Maximum current on VSS pin | 250 | mA | -40°C ≤ TA ≤ +85°C | 390 | |||
| Maximum current on VDD pin | 250 | mA | -40°C ≤ TA ≤ +85°C | 390 | |||
| Maximum current on any I/O pin | 50 | mA | 390 | ||||
| Clamp current | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 390 | ||
| Total power dissipation | 800 | mW | 390 | ||||
| RAM data retention voltage | VDR | 1.5 | V | Device in Sleep mode | 393 | ||
| Power-on Reset release voltage | VPOR | 1.6 | V | BOR and LPBOR disabled | 393 | ||
| Power-on Reset rearm voltage | VPORR | 0.8 | V | BOR and LPBOR disabled | 393 | ||
| VDD rise rate for internal POR | SVDD | 0.05 | V/ms | BOR and LPBOR disabled | 393 | ||
| Supply current XT 4 MHz | IDDXT4 | 292 | 390 | uA | XT = 4 MHz, 3.0V | 395 | |
| Supply current HFINTOSC 16 MHz | IDDHFO16 | 1.2 | 1.5 | mA | HFINTOSC = 16 MHz, 3.0V | 395 | |
| Supply current HFINTOSC 32 MHz | IDDHFOPLL | 2 | 2.6 | mA | HFINTOSC = 32 MHz, 3.0V | 395 | |
| Supply current HS+PLL 32 MHz | IDDHSPLL32 | 2 | 2.4 | mA | HS+PLL = 32 MHz, 3.0V | 395 | |
| Idle mode supply current | IDDIDLE | 733 | 1100 | uA | Idle Mode, HFINTOSC = 16 MHz, 3.0V | 395 | |
| Doze mode supply current | IDDDOZE | 786 | uA | DOZE mode, HFINTOSC = 16 MHz, DOZE Ratio = 16, 3.0V | 395 | ||
| Power-down current base | IPD | 0.03 | 2 | µA | 3.0V, VREGPM = 1, max at +85°C | 396 | |
| Power-down current base, VREGPM = 0 | IPD | 12.8 | 22 | µA | 3.0V, VREGPM = 0, max at +85°C | 396 | |
| Power-down current LFINTOSC/WDT | IPD_WDT | 0.4 | 2.9 | µA | 3.0V, max at +85°C | 396 | |
| Power-down current secondary oscillator | IPD_SOSC | 1.3 | 2.8 | µA | 3.0V, max at +85°C | 396 | |
| Power-down current FVR | IPD_FVR | 45 | 74 | µA | 3.0V, max at +85°C | 396 | |
| Power-down current BOR | IPD_BOR | 10.6 | 16 | µA | 3.0V, max at +85°C | 396 | |
| Power-down current LPBOR | IPD_LPBOR | 0.3 | 2.5 | µA | 3.0V, max at +85°C | 396 | |
| Power-down current ADC non-converting | IPD_ADCA | 0.3 | 2 | µA | 3.0V, ADC not converting, max at +85°C | 396 | |
| Power-down current comparator | IPD_CMP | 30 | 45 | µA | 3.0V, max at +85°C | 396 | |
| Input low voltage, TTL buffer | VIL | 0.8 | V | 4.5V ≤ VDD ≤ 5.5V | 397 | ||
| Input low voltage, TTL buffer | VIL | 0.15 | V | 1.8V ≤ VDD ≤ 4.5V, max is 0.15 VDD | 397 | ||
| Input low voltage, Schmitt Trigger | VIL | 0.2 | V | 2.0V ≤ VDD ≤ 5.5V, max is 0.2 VDD | 397 | ||
| Input high voltage, TTL buffer | VIH | 0.8 | V | 1.8V ≤ VDD ≤ 4.5V, min is 0.25 VDD + 0.8 | 397 | ||
| Input high voltage, Schmitt Trigger | VIH | 0.8 | V | 2.0V ≤ VDD ≤ 5.5V, min is 0.8 VDD | 397 | ||
| Input leakage current, I/O ports | IIL | -125 | 5 | 125 | nA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance, 85°C | 397 |
| Weak pull-up current | IPUR | 25 | 120 | 200 | µA | VDD = 3.0V, VPIN = VSS | 397 |
| Output low voltage | VOL | 0.6 | V | IOL = 10.0 mA, VDD = 3.0V | 397 | ||
| Output high voltage | VOH | 0.7 | V | IOH = 6.0 mA, VDD = 3.0V, min is VDD - 0.7 | 397 | ||
| I/O pin capacitance | CIO | 5 | 50 | pF | All I/O pins | 397 | |
| HFINTOSC accuracy | FHFOSC | -5 | 5 | % | -40°C to +125°C, per Figure 35-6 (±2% to ±5% regions) | 402 | |
| LFINTOSC frequency | FLFOSC | 31 | kHz | 402 | |||
| Brown-out Reset voltage | VBOR | 1.8 | 1.9 | 2.1 | V | BORV = 1 (PIC16LF18313/18323) | 406 |
| Brown-out Reset voltage | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 0 | 406 |
| Low-power Brown-out Reset voltage | VLPBOR | 1.8 | 2.1 | 2.5 | V | PIC16LF18313/18323 | 406 |
| Watchdog Timer time-out period | TWDT | 10 | 16 | 27 | ms | 16 ms Nominal Reset Time | 406 |
| Power-up Timer period | TPWRT | 40 | 65 | 140 | ms | 406 | |
| ADC resolution | NR | 10 | bit | VDD = 3.0V, TA = 25°C | 407 | ||
| ADC integral error | EIL | -1 | 0.1 | 1 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 407 |
| ADC differential error | EDL | -1 | 0.1 | 1 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 407 |
| ADC offset error | EOFF | -2 | 0.5 | 2 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 407 |
| ADC gain error | EGN | -2 | 0.2 | 2 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 407 |
| Comparator input offset voltage | VIOFF | -50 | 50 | mV | VICM = VDD/2 | 410 | |
| Comparator hysteresis | CHYST | 15 | 25 | 35 | mV | 410 | |
| FVR 1x gain accuracy | VFVR1 | -4 | 4 | % | VDD ≥ 2.5V, -40°C to 85°C | 410 | |
| FVR 2x gain accuracy | VFVR2 | -4 | 4 | % | VDD ≥ 2.5V, -40°C to 85°C | 410 | |
| Thermal resistance junction-to-ambient | θJA | 100 | °C/W | 14-pin TSSOP package | 399 | ||
| Thermal resistance junction-to-case | θJC | 24.4 | °C/W | 14-pin TSSOP package | 399 | ||
| Maximum junction temperature | TJMAX | 150 | °C | 399 | |||
| Power dissipation | PD | 0.8 | W | PD = PINTERNAL + PI/O | 399 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PPS | BODY RxyPPS | 259 |
CAD (KiCad official)
- Symbol:
PIC16LF18323-I - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
pic16lf18323-i-etched.step/pic16lf18323-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic16lf18323-i.step/pic16lf18323-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (471 pp, sha256
5b9713da292b02eb, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).