component
DP4407B
Public Made by Adomby adom
Shenzhen Developer Microelec. MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDP4407B
Shenzhen Developer Microelec. · MOSFETs · SOP-8
DP4407B from Shenzhen Developer Microelec., in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET (VDS -30 V, ID -12 A), tied with pins 2 and 3. |
| 2 | S | passive | Source of the P-channel MOSFET (VDS -30 V, ID -12 A), tied with pins 1 and 3. |
| 3 | S | passive | Source of the P-channel MOSFET (VDS -30 V, ID -12 A), tied with pins 1 and 2. |
| 4 | G | input | Gate of the P-channel MOSFET, rated VGS ±25 V with threshold VGS(th) of -1 V min to -3 V max. |
| 5 | D | passive | Drain of the P-channel MOSFET (VDS -30 V, ID -12 A continuous, -60 A pulsed), tied with pins 6, 7 and 8. |
| 6 | D | passive | Drain of the P-channel MOSFET (VDS -30 V, ID -12 A continuous, -60 A pulsed), tied with pins 5, 7 and 8. |
| 7 | D | passive | Drain of the P-channel MOSFET (VDS -30 V, ID -12 A continuous, -60 A pulsed), tied with pins 5, 6 and 8. |
| 8 | D | passive | Drain of the P-channel MOSFET (VDS -30 V, ID -12 A continuous, -60 A pulsed), tied with pins 5, 6 and 7. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen Developer Microelec. |
| Package | SOP-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -30 | V | VGS=0V, ID=-250μA | 3 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | μA | VDS=-30V, VGS=0V | 3 | ||
| Gate-Body Leakage Current | IGSS | -100 | 100 | nA | VGS=±25V, VDS=0V | 3 | |
| Gate Threshold Voltage | VGS(th) | -1 | -1.8 | -3 | V | VDS=VGS, ID=-250μA | 3 |
| Drain-Source On-State Resistance | RDS(ON) | 9 | 11 | mΩ | VGS=-20V, ID=-12A | 3 | |
| Drain-Source On-State Resistance | RDS(ON) | 10 | 13 | mΩ | VGS=-10V, ID=-12A | 3 | |
| Drain-Source On-State Resistance | RDS(ON) | 12.7 | 17 | mΩ | VGS=-6V, ID=-10A | 3 | |
| Diode Forward Voltage | VSD | -0.7 | -1 | V | VGS=0V, IS=-1A | 3 | |
| Drain-Source Voltage | VDS | -30 | V | 2 | |||
| Gate-Source Voltage | VGS | -25 | 25 | V | 2 | ||
| Drain Current-Continuous | ID | -12 | A | TJ=25℃ | 2 | ||
| Pulsed Drain Current | IDM | -60 | A | Pulsed (note b: guaranteed by design, not subject to production testing) | 2 | ||
| Drain-Source Diode Forward Current | IS | -3 | A | 2 | |||
| Maximum Power Dissipation | PD | 3.1 | W | Surface mounted on 1in² pad area, T<10 sec (note a) | 2 | ||
| Operating Junction and Storage Temperature Range | TJ,TSTG | -55 | 150 | ℃ | 2 | ||
| Thermal Resistance, Junction-to-Ambient | RθJA | 60 | ℃/W | Surface mounted on 1in² pad area, T<10 sec (note a) | 2 |
CAD (KiCad official)
- Symbol:
DP4407B - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
dp4407b-etched.step/dp4407b-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dp4407b.step/dp4407b.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen Developer Microelec. datasheet (8 pp, sha256
932b8f42fe9d8995, retrieved 2026-10-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).