component
PDTC114ET-QR
Public Made by Adomby adom
Nexperia Bipolar (BJT), SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPDTC114ET-QR
Nexperia · Bipolar (BJT) · SOT-23
PDTC114ET-QR from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I | input | Input (base) of the built-in bias network (R1 = 10 kΩ, R2 = 10 kΩ); the datasheet limits input voltage to 40 V positive and -10 V negative. |
| 2 | GND | power_in | Ground (emitter) pin, the common reference for the transistor and the bias resistors. |
| 3 | O | output | Output (collector) pin; the datasheet rates the output current IO at 100 mA maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Bias resistor 1 (R1) | R1 | 7 | 10 | 13 | kΩ | 5 | |
| Bias resistor ratio (R2/R1) | R2/R1 | 0.8 | 1 | 1.2 | 5 | ||
| DC current gain | hFE | 30 | VCE = 5 V; IC = 5 mA; Tamb = 25 °C | 5 | |||
| Collector-base breakdown voltage | V(BR)CBO | 50 | V | IC = 100 µA; IE = 0 A; Tamb = 25 °C | 5 | ||
| Collector-emitter breakdown voltage | V(BR)CEO | 50 | V | IC = 2 mA; IB = 0 A; Tamb = 25 °C | 5 | ||
| Collector-base cut-off current | ICBO | 100 | nA | VCB = 50 V; IE = 0 A; Tamb = 25 °C | 5 | ||
| Collector-emitter cut-off current | ICEO | 100 | nA | VCE = 30 V; IB = 0 A; Tamb = 25 °C | 5 | ||
| Collector-emitter cut-off current | ICEO | 5 | µA | VCE = 30 V; IB = 0 A; Tj = 150 °C | 5 | ||
| Emitter-base cut-off current | IEBO | 400 | µA | VEB = 5 V; IC = 0 A; Tamb = 25 °C | 5 | ||
| Collector-emitter saturation voltage | VCEsat | 100 | mV | IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C | 5 | ||
| Off-state input voltage | VI(off) | 1.1 | 0.8 | V | VCE = 5 V; IC = 100 µA; Tamb = 25 °C | 5 | |
| On-state input voltage | VI(on) | 2.5 | 1.8 | V | VCE = 0.3 V; IC = 10 mA; Tamb = 25 °C | 5 | |
| Collector capacitance | Cc | 2.5 | pF | VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C | 5 | ||
| Collector-base voltage | VCBO | 50 | V | open emitter | 3 | ||
| Collector-emitter voltage | VCEO | 50 | V | open base | 3 | ||
| Emitter-base voltage | VEBO | 10 | V | open collector | 3 | ||
| Input voltage positive | VI | 40 | V | positive | 3 | ||
| Input voltage negative | VI | -10 | V | negative | 3 | ||
| Output current | IO | 100 | mA | 3 | |||
| Total power dissipation | Ptot | 250 | mW | Tamb ≤ 25 °C | 3 | ||
| Junction temperature | Tj | 150 | °C | 3 | |||
| Ambient temperature | Tamb | -65 | 150 | °C | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Thermal resistance from junction to ambient | Rth(j-a) | 500 | K/W | in free air | 4 |
CAD (KiCad official)
- Symbol:
PDTC114ET-QR - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
pdtc114et-qr-etched.step/pdtc114et-qr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pdtc114et-qr.step/pdtc114et-qr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (13 pp, sha256
3baa3271fd57e5a2, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).