component
HGX13433EIM
Public Unreviewedby Ray
HGSEMI RS-485 / RS-422 ICs, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHGX13433EIM
HGSEMI · RS-485 / RS-422 ICs · SOP-14
HGX13433EIM from HGSEMI, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VL | power_in | Logic-interface supply input (1.62 V to VCC). Powers the low-voltage logic side (including RO output). Bypass to GND with a 0.1 µF capacitor placed as close to the pin as possible. |
| 2 | RO | output | Receiver output. When receiver is enabled: RO is high if V(A)-V(B) > -50 mV, low if V(A)-V(B) < -200 mV. Output swings between GND and VL. |
| 3 | DE | input | Driver output enable (active high). DE=high enables the driver; DE=low places Y/Z outputs in high-impedance. With RE=high and DE=low the chip enters low-power shutdown. |
| 4 | RE | input | Receiver output enable, active low (RE with overbar). RE=low enables RO; RE=high disables the receiver. With RE=high and DE=low the chip enters low-power shutdown. |
| 5 | DI | input | Driver input. DI=low forces Y=low and Z=high; DI=high forces Y=high and Z=low. Logic levels referenced to VL (VIH ≥ 2/3·VL, VIL ≤ 1/3·VL). |
| 6 | GND | power_in | Ground reference. Tie to system ground; internally common with pin 8. |
| 7 | NC | unconnected | No connect. Leave floating or tie to GND per PCB convention; not internally bonded to any function. |
| 8 | GND | power_in | Ground reference. Tie to system ground; internally common with pin 6. |
| 9 | Y | bidirectional | Driver non-inverting output / receiver non-inverting input on the transmit-pair side (full-duplex RS-422). Bus pin, rated -8 V to +13 V, ±15 kV HBM ESD. |
| 10 | Z | bidirectional | Driver inverting output / receiver inverting input on the transmit-pair side (full-duplex RS-422). Bus pin, rated -8 V to +13 V, ±15 kV HBM ESD. |
| 11 | B | input | Receiver inverting input (receive pair). 1/8 unit-load input impedance (typ. 96 kΩ), allowing up to 256 transceivers on the bus. Bus pin, ±15 kV HBM / ±12 kV IEC 61000-4-2 contact ESD. |
| 12 | A | input | Receiver non-inverting input (receive pair). 1/8 unit-load input impedance (typ. 96 kΩ). Bus pin, ±15 kV HBM / ±12 kV IEC 61000-4-2 contact ESD. |
| 13 | NC | unconnected | No connect. Leave floating or tie to GND per PCB convention; not internally bonded to any function. |
| 14 | VCC | power_in | Positive supply, 3.0 V to 5.5 V (typ. 3.3 V/5 V). Bypass to GND with a 0.1 µF capacitor placed close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-14 |
| Category | Interface |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
HGX13433EIM/TRHGX13433EIMT/TR
CAD (KiCad official)
- Symbol:
HGX13433EIM - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (None pp, sha256
72c83ad22f74e434, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).