component
FM24C32D-SO-T-G
Public Made by Adomby adom
FUDAN MICRO EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFM24C32D-SO-T-G
FUDAN MICRO · EEPROM · SOIC-8
FM24C32D-SO-T-G from FUDAN MICRO, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input, hardwired or left floating; if left floating it is pulled down internally to GND when board coupling to VCC is below 3 pF, and FMSH recommends connecting it to GND when coupling exceeds 3 pF. |
| 2 | A1 | input | Device address input, hardwired or left floating; if left floating it is pulled down internally to GND when board coupling to VCC is below 3 pF, and FMSH recommends connecting it to GND when coupling exceeds 3 pF. |
| 3 | A2 | input | Device address input, hardwired or left floating; if left floating it is pulled down internally to GND when board coupling to VCC is below 3 pF, and FMSH recommends connecting it to GND when coupling exceeds 3 pF. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | Bi-directional open-drain serial data pin for the 2-wire bus, which may be wire-ORed with other open-drain or open-collector devices. |
| 6 | SCL | input | Serial clock input; data is clocked into the device on the positive edge and clocked out on the negative edge of SCL. |
| 7 | WP | input | Write protect input: connecting it to GND allows normal write operations, while connecting it to VCC inhibits all write operations to the memory; if left floating it is pulled down internally when board coupling to VCC is below 3 pF, and FMSH recommends GND connection when coupling exceeds 3 pF. |
| 8 | VCC | power_in | Power supply, specified from 1.7 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FUDAN MICRO |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature (Plastic Package) | -55 | 125 | °C | 3 | |||
| Storage Temperature (Plastic Package) | -65 | 150 | °C | 3 | |||
| Voltage on Any Pin with Respect to Ground | -1 | 7 | V | 3 | |||
| Maximum Operating Voltage | 6.25 | V | 3 | ||||
| DC Output Current | 5 | mA | 3 | ||||
| Supply Voltage | VCC | 1.7 | 5.5 | V | 6 | ||
| Operating Ambient Temperature | TA | -40 | 85 | °C | Recommended operating range | 6 | |
| Supply Current, Read | ICC1 | 0.4 | 1 | mA | VCC = 5.0V, Read at 400KHz | 6 | |
| Supply Current, Write | ICC2 | 2 | 3 | mA | VCC = 5.0V, Write at 400KHz | 6 | |
| Standby Current | ISB1 | 1 | µA | VCC = 1.7V, VIN = VCC/ VSS | 6 | ||
| Standby Current | ISB2 | 6 | µA | VCC = 5.5V, VIN = VCC/ VSS | 6 | ||
| Input Leakage Current | ILI | 0.1 | 3 | µA | VIN = VCC/VSS | 6 | |
| Output Leakage Current | ILO | 0.05 | 3 | µA | VOUT = VCC/ VSS | 6 | |
| Input Low Level | VIL | -0.6 | V | 6 | |||
| Output Low Level 2 | VOL2 | 0.4 | V | VCC = 3.0V, IOL = 2.1 mA | 6 | ||
| Output Low Level 1 | VOL1 | 0.2 | V | VCC = 1.7V, IOL = 0.15 mA | 6 | ||
| Input Capacitance | CIN | 6 | pF | VIN = 0V, f = 1MHz | 6 | ||
| Output Capacitance | COUT | 8 | pF | VOUT = 0V, f = 1MHz | 6 | ||
| Clock Frequency, SCL | fBSCLB | 400 | kHz | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Clock Pulse Width Low | tBLOWB | 1.3 | µs | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Clock Pulse Width High | tBHIGHB | 0.6 | µs | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Noise Suppression Time | tBIB | 80 | ns | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Clock Low to Data Out Valid | tBAAB | 0.1 | 0.9 | µs | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | |
| Bus Free Time before New Transmission | tBBUF | 1.3 | µs | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Start Hold Time | tBHD.STAB | 0.6 | µs | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Start Setup Time | tBSU.STAB | 0.6 | µs | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Data In Hold Time | tHD.DATB | 0 | µs | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Data In Setup Time | tBSU.DATB | 100 | ns | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Inputs Rise Time | tBRB | 300 | ns | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Inputs Fall Time | tBFB | 300 | ns | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Stop Setup Time | tBSU.STOB | 0.6 | µs | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Data Out Hold Time | tBDHB | 100 | ns | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Write Cycle Time | tBWRB | 5 | ms | 400 kHz table; VCC = 1.7V to 5.5V, CL = 100 pF | 7 | ||
| Endurance | 1e+06 | write cycles | 3.3V, 25°C, Page Mode | 7 | |||
| Clock Frequency, SCL | fBSCLB | 1 | MHz | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 | ||
| Clock Pulse Width Low | tBLOWB | 500 | ns | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 | ||
| Clock Pulse Width High | tBHIGHB | 320 | ns | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 | ||
| Clock Low to Data Out Valid | tBAAB | 450 | ns | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 | ||
| Bus Free Time before New Transmission | tBBUF | 500 | ns | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 | ||
| Start Hold Time | tBHD.STAB | 250 | ns | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 | ||
| Start Setup Time | tBSU.STAB | 250 | ns | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 | ||
| Data In Hold Time | tHD.DATB | 0 | ns | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 | ||
| Data In Setup Time | tBSU.DATB | 50 | ns | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 | ||
| Inputs Rise Time | tBRB | 120 | ns | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 | ||
| Inputs Fall Time | tBFB | 120 | ns | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 | ||
| Stop Setup Time | tBSU.STOB | 250 | ns | 1 MHz table; VCC = 2.5V to 5.5V, CL = 100 pF | 7 |
CAD (KiCad official)
- Symbol:
FM24C32D-SO-T-G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
fm24c32d-so-t-g-etched.step/fm24c32d-so-t-g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fm24c32d-so-t-g.step/fm24c32d-so-t-g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FUDAN MICRO datasheet (28 pp, sha256
76cc902c4e8b5b12, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).