component
TPS65283RGER
Public Made by Adomby adom
Texas Instruments DC-DC Converters, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS65283RGER
Texas Instruments · DC-DC Converters · VQFN-24-EP(4x4)
TPS65283RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGOOD2 | output | Power good indicator for buck2; asserts low when output voltage is out of regulation due to thermal shutdown, dropout, overvoltage, disabled, or during soft start. |
| 2 | EN1 | input | Enable pin for buck1; high signal enables converter, optional ceramic capacitor provides delayed startup. |
| 3 | EN2 | input | Enable pin for buck2; high signal enables converter, optional ceramic capacitor provides delayed startup. |
| 4 | ROSC/SYNC | input | Programmable oscillator frequency from 200 kHz to 2 MHz via external resistor or external clock synchronization input. |
| 5 | SW_EN | input | Enable input for power switch; float to enable. |
| 6 | nFAULT | output | Active-low open-drain output; asserted low during power switch overcurrent or reverse-voltage condition. |
| 7 | SW_OUT | power_out | Power switch output node. |
| 8 | SW_IN | power_in | Power switch input node; input voltage range 2.4 V to 6 V. |
| 9 | VIN2 | power_in | Input power supply for buck2; connect with 10 µF ceramic capacitor as close as possible to pin. |
| 10 | PGND2 | power_in | Power ground connection for buck2; connect as close as possible to negative terminal of input capacitor. |
| 11 | LX2 | output | Switching node for buck2; voltage swings from diode drop below ground to buck2 input voltage. |
| 12 | BST2 | passive | Bootstrap supply for buck2 high-side gate driver; connect 47 nF ceramic capacitor from this pin to LX2. |
| 13 | COMP2 | output | Error amplifier output and compensation pin for buck2; connect series resistor and capacitor for control loop compensation. |
| 14 | FB2 | input | Feedback sensing pin for buck2 output voltage; feedback reference voltage 0.6 V ±1%, connect to resistor divider network. |
| 15 | RSET | input | Power switch current limit programming pin; external resistor sets current limit threshold, recommended range 9.1 kΩ to 80.6 kΩ. |
| 16 | AGND | power_in | Analog ground common to buck and power switch controllers; route separately from power grounds to V7V bypass capacitor negative terminal. |
| 17 | FB1 | input | Feedback sensing pin for buck1 output voltage; feedback reference voltage 0.6 V ±1%, connect to resistor divider network. |
| 18 | COMP1 | output | Error amplifier output and compensation pin for buck1; connect series resistor and capacitor for control loop compensation. |
| 19 | BST1 | passive | Bootstrap supply for buck1 high-side gate driver; connect 47 nF ceramic capacitor from this pin to LX1. |
| 20 | LX1 | output | Switching node for buck1; voltage swings from diode drop below ground to buck1 input voltage. |
| 21 | PGND1 | power_in | Power ground connection for buck1; connect as close as possible to negative terminal of input capacitor. |
| 22 | VIN1 | power_in | Input power supply for buck1 and internal analog bias circuits; connect with 10 µF ceramic capacitor as close as possible to pin. |
| 23 | V7V | power_out | Internal linear regulator output at typical 6.3 V for gate drivers and internal circuits; minimum 1 µF ceramic capacitor required for decoupling. |
| 24 | PGOOD1 | output | Power good indicator for buck1; asserts low when output voltage is out of regulation due to thermal shutdown, dropout, overvoltage, disabled, or during soft start. |
| 25 | PowerPAD | power_in | Exposed thermal pad underneath IC package; connect to power ground with multiple vias for thermal dissipation, no internal signal connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
TPS65283RGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
tps65283rger-etched.step/tps65283rger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps65283rger.step/tps65283rger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (43 pp, sha256
eb69c587d9ca6697, retrieved 2026-09-25, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).