SN74HCT04IDREP from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1A	input	Input of inverter 1 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
2	1Y	output	Output of inverter 1; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
3	2A	input	Input of inverter 2 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
4	2Y	output	Output of inverter 2; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
5	3A	input	Input of inverter 3 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
6	3Y	output	Output of inverter 3; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
7	GND	power_in	Ground reference; continuous current through VCC or GND is limited to ±50 mA.
8	4Y	output	Output of inverter 4; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
9	4A	input	Input of inverter 4 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
10	5Y	output	Output of inverter 5; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
11	5A	input	Input of inverter 5 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
12	6Y	output	Output of inverter 6; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
13	6A	input	Input of inverter 6 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
14	VCC	power_in	Supply voltage, 4.5 V to 5.5 V recommended (absolute maximum 7 V).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-14
Category	Logic ICs
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage range	VCC	-0.5		7	V		2
Input clamp current	IIK	-20		20	mA	VI < 0 or VI > VCC (see Note 1)	2
Output clamp current	IOK	-20		20	mA	VO < 0 or VO > VCC (see Note 1)	2
Continuous output current	IO	-25		25	mA	VO = 0 to VCC	2
Continuous current through VCC or GND	ICC	-50		50	mA		2
Storage temperature range	Tstg	-65		150	°C		2
Package thermal impedance	θJA			86	°C/W	JESD 51-7 (see Note 2)	2
Supply voltage	VCC	4.5	5	5.5	V		2
High-level input voltage	VIH	2			V	VCC = 4.5 V to 5.5 V	2
Low-level input voltage	VIL			0.8	V	VCC = 4.5 V to 5.5 V	2
Input voltage	VI	0			V		2
Output voltage	VO	0			V		2
Input transition rise/fall time	Δt/Δv			500	ns		2
Operating free-air temperature	TA	-40		85	°C		2
High-level output voltage	VOH	4.4	4.499		V	VI = VIH or VIL, IOH = −20 µA, VCC = 4.5 V; min over full TA range, typ at TA = 25°C	2
High-level output voltage	VOH	3.84	4.3		V	VI = VIH or VIL, IOH = −4 mA, VCC = 4.5 V; min over full TA range, typ at TA = 25°C	2
Low-level output voltage	VOL		0.001	0.1	V	VI = VIH or VIL, IOL = 20 µA, VCC = 4.5 V; max over full TA range, typ at TA = 25°C	2
Low-level output voltage	VOL		0.17	0.33	V	VI = VIH or VIL, IOL = 4 mA, VCC = 4.5 V; max over full TA range, typ at TA = 25°C	2
Input current	II	-1000	0.1	1000	nA	VI = VCC or 0, VCC = 5.5 V; ±1000 over full TA range, typ at TA = 25°C	2
Quiescent supply current	ICC		2	20	µA	VI = VCC or 0, IO = 0, VCC = 5.5 V	2
Increase in supply current per TTL-level input	ΔICC		1.4	2.9	mA	One input at 0.5 V or 2.4 V, other inputs at 0 or VCC, VCC = 5.5 V; max over full TA range, typ at TA = 25°C	2
Input capacitance	Ci		3	10	pF	VCC = 4.5 V to 5.5 V	2
Propagation delay A to Y	tpd		14	25	ns	CL = 50 pF, VCC = 4.5 V; max over full TA range, typ at TA = 25°C	3
Propagation delay A to Y	tpd		13	23	ns	CL = 50 pF, VCC = 5.5 V; max over full TA range, typ at TA = 25°C	3
Output transition time Y	tt		9	19	ns	CL = 50 pF, VCC = 4.5 V; max over full TA range, typ at TA = 25°C	3
Output transition time Y	tt		8	17	ns	CL = 50 pF, VCC = 5.5 V; max over full TA range, typ at TA = 25°C	3

CAD (KiCad official)

Symbol: SN74HCT04IDREP
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)
3D model files: sn74hct04idrep-etched.step / sn74hct04idrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hct04idrep.step / sn74hct04idrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (11 pp, sha256 0cb0aff9e0f8f8fa, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

SN74HCT04IDREP

Verified SN74HCT04IDREP

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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