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SN74HCT04IDREP

Public Made by Adom

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Texas Instruments Inverters, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssn74hct04idrepfactory-2.0.0extractor-text

Verified SN74HCT04IDREP

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN74HCT04IDREP · SOIC-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 11-page datasheet
  • ✓distributor: lcsc C2871273, digikey 296-22303-2-ND, mouser 595-SN74HCT04IDREP
  • ✓family: SOIC-14_3.9x8.7mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-1fa8am0h/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.8)
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn74hct04idrep.kicad_sym✓ sn74hct04idrep.kicad_mod✓ sn74hct04idrep.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10h ago
viewers sn74hct04idrep: viewers · Ray 10h ago
package.json Publish 0.1.0 · Ray 10h ago
page.json Set visibility: public · Ray 10h ago
README.md Publish 0.1.0 · Ray 10h ago
sn74hct04idrep-etched.glb Publish 0.1.0 · Ray 10h ago
sn74hct04idrep-etched.step sn74hct04idrep: factory component page (tier=mfr) · Ray 10h ago
sn74hct04idrep-hero.glb sn74hct04idrep: hero GLB from the etched model (keeps the MPN mark) · Ray 10h ago
sn74hct04idrep-hero.overlay.json Publish 0.1.0 · Ray 10h ago
sn74hct04idrep.glb Publish 0.1.0 · Ray 10h ago
sn74hct04idrep.kicad_mod Publish 0.1.0 · Ray 10h ago
sn74hct04idrep.kicad_sym Publish 0.1.0 · Ray 10h ago
sn74hct04idrep.lbr Publish 0.1.0 · Ray 10h ago
sn74hct04idrep.step Publish 0.1.0 · Ray 10h ago
verification.json Verified: Published by the parts factory: tier mfr, 14 pins · Ray 10h ago

SN74HCT04IDREP

Texas Instruments · Inverters · SOIC-14

SN74HCT04IDREP from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input of inverter 1 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
2 1Y output Output of inverter 1; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
3 2A input Input of inverter 2 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
4 2Y output Output of inverter 2; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
5 3A input Input of inverter 3 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
6 3Y output Output of inverter 3; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
7 GND power_in Ground reference; continuous current through VCC or GND is limited to ±50 mA.
8 4Y output Output of inverter 4; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
9 4A input Input of inverter 4 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
10 5Y output Output of inverter 5; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
11 5A input Input of inverter 5 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
12 6Y output Output of inverter 6; ±4 mA output drive at 5 V and can drive up to 10 LSTTL loads, with continuous output current limited to ±25 mA.
13 6A input Input of inverter 6 (Y = A); TTL-voltage compatible with 1 µA max input current, and unused inputs must be held at VCC or GND.
14 VCC power_in Supply voltage, 4.5 V to 5.5 V recommended (absolute maximum 7 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 2
Input clamp current IIK -20 20 mA VI < 0 or VI > VCC (see Note 1) 2
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC (see Note 1) 2
Continuous output current IO -25 25 mA VO = 0 to VCC 2
Continuous current through VCC or GND ICC -50 50 mA 2
Storage temperature range Tstg -65 150 °C 2
Package thermal impedance θJA 86 °C/W JESD 51-7 (see Note 2) 2
Supply voltage VCC 4.5 5 5.5 V 2
High-level input voltage VIH 2 V VCC = 4.5 V to 5.5 V 2
Low-level input voltage VIL 0.8 V VCC = 4.5 V to 5.5 V 2
Input voltage VI 0 V 2
Output voltage VO 0 V 2
Input transition rise/fall time Δt/Δv 500 ns 2
Operating free-air temperature TA -40 85 °C 2
High-level output voltage VOH 4.4 4.499 V VI = VIH or VIL, IOH = −20 µA, VCC = 4.5 V; min over full TA range, typ at TA = 25°C 2
High-level output voltage VOH 3.84 4.3 V VI = VIH or VIL, IOH = −4 mA, VCC = 4.5 V; min over full TA range, typ at TA = 25°C 2
Low-level output voltage VOL 0.001 0.1 V VI = VIH or VIL, IOL = 20 µA, VCC = 4.5 V; max over full TA range, typ at TA = 25°C 2
Low-level output voltage VOL 0.17 0.33 V VI = VIH or VIL, IOL = 4 mA, VCC = 4.5 V; max over full TA range, typ at TA = 25°C 2
Input current II -1000 0.1 1000 nA VI = VCC or 0, VCC = 5.5 V; ±1000 over full TA range, typ at TA = 25°C 2
Quiescent supply current ICC 2 20 µA VI = VCC or 0, IO = 0, VCC = 5.5 V 2
Increase in supply current per TTL-level input ΔICC 1.4 2.9 mA One input at 0.5 V or 2.4 V, other inputs at 0 or VCC, VCC = 5.5 V; max over full TA range, typ at TA = 25°C 2
Input capacitance Ci 3 10 pF VCC = 4.5 V to 5.5 V 2
Propagation delay A to Y tpd 14 25 ns CL = 50 pF, VCC = 4.5 V; max over full TA range, typ at TA = 25°C 3
Propagation delay A to Y tpd 13 23 ns CL = 50 pF, VCC = 5.5 V; max over full TA range, typ at TA = 25°C 3
Output transition time Y tt 9 19 ns CL = 50 pF, VCC = 4.5 V; max over full TA range, typ at TA = 25°C 3
Output transition time Y tt 8 17 ns CL = 50 pF, VCC = 5.5 V; max over full TA range, typ at TA = 25°C 3

CAD (KiCad official)

  • Symbol: SN74HCT04IDREP
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74hct04idrep-etched.step / sn74hct04idrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hct04idrep.step / sn74hct04idrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (11 pp, sha256 0cb0aff9e0f8f8fa, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF