component
HEF4060BT
Public Unreviewedby Ray
Nexperia Counters / Dividers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHEF4060BT
Nexperia · Counters / Dividers · SOIC-16
HEF4060BT from Nexperia, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q11 | output | Buffered counter output for the 11th ripple-carry stage. CMOS push-pull output; VOH >= VDD-0.05 V at |
| 2 | Q12 | output | Buffered counter output for the 12th ripple-carry stage. CMOS push-pull output. |
| 3 | Q13 | output | Buffered counter output for the 13th ripple-carry stage. CMOS push-pull output. |
| 4 | Q5 | output | Buffered counter output for the 5th ripple-carry stage. CMOS push-pull output. |
| 5 | Q4 | output | Buffered counter output for the 4th ripple-carry stage. CMOS push-pull output. |
| 6 | Q6 | output | Buffered counter output for the 6th ripple-carry stage. CMOS push-pull output. |
| 7 | Q3 | output | Buffered counter output for the 3rd ripple-carry stage. CMOS push-pull output. |
| 8 | VSS | power_in | Ground supply voltage (0 V reference). |
| 9 | CEXT | passive | External capacitor connection for the on-chip RC/crystal oscillator. Leave floating when driving RS with an external clock. |
| 10 | REXT | passive | Oscillator pin; external resistor connection for the on-chip RC/crystal oscillator. Leave floating when driving RS with an external clock. |
| 11 | RS | input | Clock input / oscillator pin. Counter advances on HIGH-to-LOW transition of RS. May be driven by an external clock signal in lieu of using the internal oscillator. |
| 12 | MR | input | Master reset (asynchronous, active HIGH). A HIGH level clears all counter stages and forces all outputs LOW independent of other inputs. |
| 13 | Q8 | output | Buffered counter output for the 8th ripple-carry stage. CMOS push-pull output. |
| 14 | Q7 | output | Buffered counter output for the 7th ripple-carry stage. CMOS push-pull output. |
| 15 | Q9 | output | Buffered counter output for the 9th ripple-carry stage. CMOS push-pull output. |
| 16 | VDD | power_in | Positive supply voltage. Operating range 3.0 V to 15.0 V (absolute max +18 V). Bypass close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
HEF4060BTHEF4060BTT
CAD (KiCad official)
- Symbol:
HEF4060BT - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (14 pp, sha256
3cbb319a05862869, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).