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Contents

README

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SN74LVC1G175DBVR

Texas Instruments · Flip Flops · SOT-23-6

SN74LVC1G175DBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLK input Clock input. Data on D is transferred to Q on the rising edge of CLK when CLR is high.
2 GND power_in Ground reference (0 V) for the device.
3 D input Data input to the D flip-flop. Sampled on the rising edge of CLK and transferred to Q when CLR is high.
4 Q output Flip-flop output. Reflects the D input latched on the last CLK rising edge; forced low when CLR is asserted low. Drive strength ±24 mA at VCC = 3.3 V.
5 VCC power_in Supply voltage input. Operating range 1.65 V to 5.5 V; inputs accept up to 5.5 V regardless of VCC.
6 CLR input Active-low asynchronous clear input. When CLR is low, Q is forced low regardless of CLK or D; normal operation resumes when CLR is high.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Logic
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC1G175DBVR
  • SN74LVC1G175DBVRDBVT
  • SN74LVC1G175DBVRDCKR
  • SN74LVC1G175DBVRDCKT
  • SN74LVC1G175DBVRDRYR
  • SN74LVC1G175DBVRYZPR

CAD (KiCad official)

  • Symbol: SN74LVC1G175DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 6f19e0a69062e117, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF