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Contents

README

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PJ78L05SQ-N

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

PJ78L05SQ-N from PJSEMI, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated 5V output. Typical VO = 5.0 V (4.75 V to 5.25 V over IO = 1 mA to 100 mA). Requires a 0.1 µF output decoupling capacitor to ground for stability.
2 GND power_in Ground / common return for the regulator. On SOT-89 this pin is also the large center tab used as the thermal/heat-sinking pad.
3 IN power_in Unregulated input voltage, up to 35 V absolute maximum. Requires a 0.33 µF input capacitor to ground close to the pin as recommended by the application circuit.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-89-3
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • PJ78L05SQ-N

CAD (KiCad official)

  • Symbol: PJ78L05SQ-N
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (3 pp, sha256 e0da4f4bfedb7582, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF