component
AMD540CE-VB
Public Made by Adomby adom
VBsemi Elec MOSFETs, TO-252-4L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAMD540CE-VB
VBsemi Elec · MOSFETs · TO-252-4L
AMD540CE-VB from VBsemi Elec, in a TO-252-4L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of channel 1 of the N- and P-pair; the datasheet gives a pulsed source-diode current of 32 A for the channel. |
| 2 | G1 | input | Gate terminal of channel 1; gate-source voltage is rated at ±20 V and RDS(on) is specified at VGS = ±10 V and ±4.5 V. |
| 3 | S2 | passive | Source terminal of channel 2 of the N- and P-pair; the datasheet gives a pulsed source-diode current of 32 A for the channel. |
| 4 | G2 | input | Gate terminal of channel 2; gate-source voltage is rated at ±20 V and RDS(on) is specified at VGS = ±10 V and ±4.5 V. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | TO-252-4L |
| Category | Transistors/Thyristors |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage (N-Ch) | VDS | 40 | V | 1 | |||
| Drain-Source Voltage (P-Ch) | VDS | -40 | V | 1 | |||
| Gate-Source Voltage (N-Ch and P-Ch) | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current (N-Ch) | ID | 50 | A | TC = 25 °C | 1 | ||
| Continuous Drain Current (P-Ch) | ID | -50 | A | TC = 25 °C | 1 | ||
| Continuous Drain Current (N-Ch) | ID | 35 | A | TC = 125 °C | 1 | ||
| Continuous Drain Current (P-Ch) | ID | -35 | A | TC = 125 °C | 1 | ||
| Continuous Source Current (Diode Conduction) (N-Ch) | IS | 50 | A | 1 | |||
| Continuous Source Current (Diode Conduction) (P-Ch) | IS | -50 | A | 1 | |||
| Pulsed Drain Current (N-Ch) | IDM | 150 | A | 1 | |||
| Pulsed Drain Current (P-Ch) | IDM | -150 | A | 1 | |||
| Single Pulse Avalanche Current (N-Ch) | IAS | 30 | A | L = 0.1 mH | 1 | ||
| Single Pulse Avalanche Current (P-Ch) | IAS | -30 | A | L = 0.1 mH | 1 | ||
| Single Pulse Avalanche Energy (N-Ch) | EAS | 245 | mJ | 1 | |||
| Single Pulse Avalanche Energy (P-Ch) | EAS | 245 | mJ | 1 | |||
| Maximum Power Dissipation (N-Ch) | PD | 108 | W | TC = 25 °C | 1 | ||
| Maximum Power Dissipation (P-Ch) | PD | 108 | W | TC = 25 °C | 1 | ||
| Maximum Power Dissipation (N-Ch) | PD | 32 | W | TC = 125 °C | 1 | ||
| Maximum Power Dissipation (P-Ch) | PD | 32 | W | TC = 125 °C | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 175 | °C | 1 | ||
| Soldering Recommendations (Peak Temperature) | 260 | °C | 1 | ||||
| Junction-to-Ambient (N-Ch) | RthJA | 85 | °C/W | PCB Mount, 1" square PCB (FR4) | 1 | ||
| Junction-to-Ambient (P-Ch) | RthJA | 85 | °C/W | PCB Mount, 1" square PCB (FR4) | 1 | ||
| Junction-to-Case (Drain) (N-Ch) | RthJC | 3.1 | °C/W | 1 | |||
| Junction-to-Case (Drain) (P-Ch) | RthJC | 3.1 | °C/W | 1 | |||
| Drain-Source Breakdown Voltage (N-Ch) | VDS | 40 | V | VGS = 0 V, ID = 250 μA | 2 | ||
| Drain-Source Breakdown Voltage (P-Ch) | VDS | -40 | V | VGS = 0 V, ID = -250 μA | 2 | ||
| Gate-Source Threshold Voltage (N-Ch) | VGS(th) | 1 | 3 | V | VDS = VGS, ID = 250 μA | 2 | |
| Gate-Source Threshold Voltage (P-Ch) | VGS(th) | -1 | -3 | V | VDS = VGS, ID = -250 μA | 2 | |
| Gate-Source Leakage (N-Ch) | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ±20 V | 2 | |
| Gate-Source Leakage (P-Ch) | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ±20 V | 2 | |
| Zero Gate Voltage Drain Current (N-Ch) | IDSS | 1 | μA | VGS = 0 V, VDS = 40 V | 2 | ||
| Zero Gate Voltage Drain Current (P-Ch) | IDSS | -1 | μA | VGS = 0 V, VDS = -40 V | 2 | ||
| Zero Gate Voltage Drain Current (N-Ch) | IDSS | 50 | μA | VGS = 0 V, VDS = 40 V, TJ = 125 °C | 2 | ||
| Zero Gate Voltage Drain Current (P-Ch) | IDSS | -50 | μA | VGS = 0 V, VDS = -40 V, TJ = 125 °C | 2 | ||
| Zero Gate Voltage Drain Current (N-Ch) | IDSS | 150 | μA | VGS = 0 V, VDS = 40 V, TJ = 175 °C | 2 | ||
| Zero Gate Voltage Drain Current (P-Ch) | IDSS | -150 | μA | VGS = 0 V, VDS = -40 V, TJ = 175 °C | 2 | ||
| On-State Drain Current (N-Ch) | ID(on) | 25 | A | VGS = 10 V, VDS 5 V | 2 | ||
| On-State Drain Current (P-Ch) | ID(on) | -25 | A | VGS = - 10 V, VDS 5 V | 2 | ||
| Input Capacitance (N-Ch) | Ciss | 1799 | 2248 | pF | VGS = 0 V, VDS = 20 V, f = 1 MHz | 2 | |
| Input Capacitance (P-Ch) | Ciss | 2000 | 3500 | pF | VGS = 0 V, VDS = - 20 V, f = 1 MHz | 2 | |
| Output Capacitance (N-Ch) | Coss | 282 | 352 | pF | VGS = 0 V, VDS = 20 V, f = 1 MHz | 2 | |
| Output Capacitance (P-Ch) | Coss | 320 | 550 | pF | VGS = 0 V, VDS = - 20 V, f = 1 MHz | 2 | |
| Reverse Transfer Capacitance (N-Ch) | Crss | 109 | 136 | pF | VGS = 0 V, VDS = 20 V, f = 1 MHz | 2 | |
| Reverse Transfer Capacitance (P-Ch) | Crss | 220 | 360 | pF | VGS = 0 V, VDS = - 20 V, f = 1 MHz | 2 | |
| Gate Resistance (N-Ch) | Rg | 2 | 4.11 | 6.2 | Ω | f = 1 MHz | 2 |
| Gate Resistance (P-Ch) | Rg | 3.1 | 6.3 | 9.5 | Ω | f = 1 MHz | 2 |
| Turn-On Delay Time (N-Ch) | td(on) | 7 | 11 | ns | VDD = 20 V, RL = 2 Ω, ID ≈ 10 A, VGEN = 10 V, Rg = 1 Ω | 3 | |
| Turn-On Delay Time (P-Ch) | td(on) | 11 | 17 | ns | VDD = -20 V, RL = 2 Ω, ID ≈ -10 A, VGEN = -10 V, Rg = 1 Ω | 3 | |
| Rise Time (N-Ch) | tr | 21 | 32 | ns | VDD = 20 V, RL = 2 Ω, ID ≈ 10 A, VGEN = 10 V, Rg = 1 Ω | 3 | |
| Rise Time (P-Ch) | tr | 9 | 14 | ns | VDD = -20 V, RL = 2 Ω, ID ≈ -10 A, VGEN = -10 V, Rg = 1 Ω | 3 | |
| Turn-Off Delay Time (N-Ch) | td(off) | 33 | 50 | ns | VDD = 20 V, RL = 2 Ω, ID ≈ 10 A, VGEN = 10 V, Rg = 1 Ω | 3 | |
| Turn-Off Delay Time (P-Ch) | td(off) | 55 | 83 | ns | VDD = -20 V, RL = 2 Ω, ID ≈ -10 A, VGEN = -10 V, Rg = 1 Ω | 3 | |
| Fall Time (N-Ch) | tf | 19 | 29 | ns | VDD = 20 V, RL = 2 Ω, ID ≈ 10 A, VGEN = 10 V, Rg = 1 Ω | 3 | |
| Fall Time (P-Ch) | tf | 91 | 137 | ns | VDD = -20 V, RL = 2 Ω, ID ≈ -10 A, VGEN = -10 V, Rg = 1 Ω | 3 | |
| Pulsed Current (N-Ch) | ISM | 32 | A | 3 | |||
| Pulsed Current (P-Ch) | ISM | -32 | A | 3 | |||
| Forward Voltage (N-Ch) | VSD | 0.79 | 1.2 | V | IS = 4 A | 3 | |
| Forward Voltage (P-Ch) | VSD | -0.82 | -1.2 | V | IS = -4 A | 3 |
CAD (KiCad official)
- Symbol:
AMD540CE-VB - Footprint:
Package_TO_SOT_SMD:TO-252-4 - 3D model: TO-252-4L (KiCad packages3D, STEP)
- 3D model files:
amd540ce-vb-etched.step/amd540ce-vb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);amd540ce-vb.step/amd540ce-vb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VBsemi Elec datasheet (13 pp, sha256
dc4694eda188138d, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).